Earlier quoted context omitted.
I don't know if MIPS is the same, but I worked on an other architecture where NOP is 0x0, and it had an interesting effect. If you called an uninitialized function pointer, and it happened to point into zero:ed out memory, the CPU would execute NOPs for a good while until it hit something else. If that something else was code, it would start executing some function from the start, but with garbage arguments. It would…
Seems like a better design choice would be to have instruction 0x0 throw some kind of page fault violation or other exception the OS can catch then.
MIPS Becomes RISC-V
221–225 of 225 posts
Re: MIPS Becomes RISC-V
#222Earlier quoted context omitted.
> You can buy them on Amazon. > Currently unavailable. We don't know when or if this item will be back in stock. Clearly not!
This board is BL602 based. Available and has a growing community. https://pine64.com/product/pinecone-bl602-evaluation-board/
Interestingly it's based on a 3 stage core from SiFive, not the RocketChip.
Re: MIPS Becomes RISC-V
#223Earlier quoted context omitted.
Check your router's CPU. I own 4 routers and all of them use MIPS. RISC-V is more like Graphene, it's yet to leave the lab.
Ho, ho. Graphene has left the lab, but it's only got as far as the hype mill, not the factory. https://www.manchester.ac.uk/discover/news/the-university-un... was a notable success though; and allegedly graphene-powered trainers there on a different date. In contrast, with RISC-V you can put your hand in your pocket for early models, can't you?
Re: MIPS Becomes RISC-V
#224Everyone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity ( edit I should have said ISA diversity ) in modern CPUs. MIPS, Alpha, and Super-H, have all but faded away. Power/PowerPC is still out there somewhere though. Apparently they're still working on SPARC, too. [0] At least we'll always have the PS2. ...until the last one breaks,…
I wish the barriers to using new architectures were lower. For instance, suppose binaries were typically distributed in a platform-agnostic format, like LLVM intermediate representation or something equivalent. When you run your program the first time, it's compiled to native code for your architecture and cached for later use. I realize I've sort of just re-invented Javascript. But what if we just did away with nati…
https://en.wikipedia.org/wiki/Architecture_Neutral_Distribut...
It didn't last.
Re: MIPS Becomes RISC-V
#225Everyone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity ( edit I should have said ISA diversity ) in modern CPUs. MIPS, Alpha, and Super-H, have all but faded away. Power/PowerPC is still out there somewhere though. Apparently they're still working on SPARC, too. [0] At least we'll always have the PS2. ...until the last one breaks,…
There isn't much diversity in software, why hardware? Maybe standardization is a strength.
If you want something really different, whether in operating systems or programming languages, you have it. KolibriOS and Haskell, say.