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MIPS Becomes RISC-V

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Re: MIPS Becomes RISC-V

#21

This is huge. It looks like the only architectures widely-deployed in ten years will be x86, ARM, Power, and RISC-V (maybe also SPARC64 in Japan, although that's rare in the US).

What is the SPARC64 use case in Japan? Supercomputing?

Re: MIPS Becomes RISC-V

#22

This is huge. It looks like the only architectures widely-deployed in ten years will be x86, ARM, Power, and RISC-V (maybe also SPARC64 in Japan, although that's rare in the US).

Depends where you look. Hard to see IBM's z/Architecture dying out in that timeframe (the latest branding for S/360-derived mainframes), for example, and the embedded space is likely to remain an odd bestiary for quite some time.

Re: MIPS Becomes RISC-V

#23

Earlier quoted context omitted.

SIMD today is only really helpful with a few usecases. If you want to encode some video, decode some jpegs, or do a physics simulation quicker, it's really going to help. It won't boot Linux any quicker tho. I suspect for consumer uses, SIMD is already used for nearly all the use cases it can be.

Are you sure about that? The original SIMD-papers in the 1980s show how to compile a Regex into a highly-parallel state machine and then "reduced" (aka: Scan / Prefix-operation: https://en.wikipedia.org/wiki/Prefix_sum ). A huge amount of operations, such as XML-whitespace removal (aka: SIMD Steam Compacting), Regular Expressions, and more, have been proven ~30 to 40 years ago to benefit from SIMD compute. Yet such l…

https://github.com/simdjson/simdjson as an example that fits in the "outside-of-a-conventional-SIMD-workload" mold.

Re: MIPS Becomes RISC-V

#24
post #17

"Development of the MIPS processor architecture has now stopped" Is anyone still developing SPARC?

Fujitsu for general purpose servers, and Atmel (maybe others too?) for rad-hardened Sparc.

> Atmel

Microchip these days, Atmel got acquired few years back..

The packaging looks cool of those https://www.microchip.com/wwwproducts/en/AT697F

Re: MIPS Becomes RISC-V

#25

This is more or less analogous to Blackberry moving to Android, isn’t it? Storied, old-guard tech company loses most of its market share, trades in its first-party stack for a rising open-source alternative. Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last-ditch effort of a fallen star of the semi market?

They're even changing the name of the company to MIPS, just like RIM → Blackberry (https://news.ycombinator.com/item?id=26389870

One big difference is most consumers, and I think even many companies using the chips, don't really care what architecture they are using, unlike with an end-user OS/"ecosystem". So if they can use their abilities and experience from MIPS to make RISC-V chips with good price to performance, they could do OK.

Re: MIPS Becomes RISC-V

#26

This is more or less analogous to Blackberry moving to Android, isn’t it? Storied, old-guard tech company loses most of its market share, trades in its first-party stack for a rising open-source alternative. Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last-ditch effort of a fallen star of the semi market?

> Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last ditch effort of a fallen star of the semi market?

Mips has seemingly been on life support sine the late 90's. I kind of think the SGI buyout and later spin-off doomed them as they were focused on building high performance workstation processors while Arm was busy focusing on low power and embedded systems. Guess who was better prepared for the mobile revolution of the 00's?

Re: MIPS Becomes RISC-V

#27

Earlier quoted context omitted.

SIMD today is only really helpful with a few usecases. If you want to encode some video, decode some jpegs, or do a physics simulation quicker, it's really going to help. It won't boot Linux any quicker tho. I suspect for consumer uses, SIMD is already used for nearly all the use cases it can be.

Are you sure about that? The original SIMD-papers in the 1980s show how to compile a Regex into a highly-parallel state machine and then "reduced" (aka: Scan / Prefix-operation: https://en.wikipedia.org/wiki/Prefix_sum ). A huge amount of operations, such as XML-whitespace removal (aka: SIMD Steam Compacting), Regular Expressions, and more, have been proven ~30 to 40 years ago to benefit from SIMD compute. Yet such l…

It seems like there are a wide variety of ways to serialize and deserialize data, their performance sometimes varies by orders of magnitude, and the slow code persists because it doesn’t matter enough to optimize compared to other virtues like convenience and maintainability.

The key seems to be figuring out how to get good (not the best) performance when you mostly care about other things?

Machine learning itself seems like an example of throwing hardware at problems to try to improve the state of the art, to the point where it becomes so expensive that they have to think about performance more.

Re: MIPS Becomes RISC-V

#28

Earlier quoted context omitted.

Are you sure about that? The original SIMD-papers in the 1980s show how to compile a Regex into a highly-parallel state machine and then "reduced" (aka: Scan / Prefix-operation: https://en.wikipedia.org/wiki/Prefix_sum ). A huge amount of operations, such as XML-whitespace removal (aka: SIMD Steam Compacting), Regular Expressions, and more, have been proven ~30 to 40 years ago to benefit from SIMD compute. Yet such l…

It seems like there are a wide variety of ways to serialize and deserialize data, their performance sometimes varies by orders of magnitude, and the slow code persists because it doesn’t matter enough to optimize compared to other virtues like convenience and maintainability. The key seems to be figuring out how to get good (not the best) performance when you mostly care about other things? Machine learning itself se…

SIMD-compute is a totally different model of compute than what most programmers are familiar with.

That's the biggest problem. If you write optimal SIMD-code, no one else in your team will understand it. Since we have so much compute these days (to the point where O(n^2) scanf parsers are all over the place), its become increasingly obvious that few modern programmers care about performance at all.

Nonetheless, the more and more I study SIMD-compute, the more I realize that these expert programmers have figured out a ton of good and fast solutions to a wide-variety of problems... decades ago and then somehow forgotten until recently.

Seriously: that Data Parallel Algorithms paper is just WTF to me. Linked list traversal (scan-reduced sum from a linked list in SIMD-parallel), Regular Expressions and more.

--------

Then I look at the GPU-graphics guys, and they're doing like BVH tree traversal in parallel so that their raytracers work.

Its like "Yeah, Raytracing is clearly a parallel operation cause GPUs can do it". So I look it up and wtf? Its not easy. Someone really thought things through. Its non-obvious how they managed to get a recursive / sequential operation to operate in highly parallel SIMD operations while avoiding branch divergence issues.

Really: think about it: Raytracing is effectively:

    If(ray hit object) recursively bounce ray.
How the hell did they make that parallel? A combination of stream-compaction and very intelligent data-structures, as well as a set of new SIMD-assembly instructions to cover some obscure cases.

There's some really intelligent stuff going on in the SIMD-compute world, that clearly applies beyond just the machine-learning crowd.

Re: MIPS Becomes RISC-V

#29

Earlier quoted context omitted.

The big innovation in architectures is in the SIMD world. AVX512 (x86 512-bit), SVE (ARM 512-bit), NVidia PTX / SASS (32x32-bit), AMD RDNA (32x32-bit), AMD CDNA (64x32-bit). 64-bit cores (aka: classic CPUs) are looking like a solved problem, and are becoming a commodity. SIMD compute however, remains an open question. NVidia probably leads today, but there seems to be plenty of room for smaller players. Heck, one maj…

SIMD today is only really helpful with a few usecases. If you want to encode some video, decode some jpegs, or do a physics simulation quicker, it's really going to help. It won't boot Linux any quicker tho. I suspect for consumer uses, SIMD is already used for nearly all the use cases it can be.

This comment seems a bit shortsighted. GPUs and TPUs are SIMD and ML models are increasingly being used in consumer hardware. Video cards are selling out so fast that there's months worth of backorders.

SIMD processors are being put in self driving cars, robots with vision, doorbell cameras, drones, etc. We're only at the beginning of SIMD use-cases.

Re: MIPS Becomes RISC-V

#30
post #24
post #17

Earlier quoted context omitted.

Fujitsu for general purpose servers, and Atmel (maybe others too?) for rad-hardened Sparc.

> Atmel Microchip these days, Atmel got acquired few years back.. The packaging looks cool of those https://www.microchip.com/wwwproducts/en/AT697F

That is an interesting look. There's an 8 bit ATMEGA like that too: https://www.microchip.com/wwwproducts/en/ATmegaS128

I wonder what that form factor with the chip suspended like that actually does for it.

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