And just a Note, TSMC Node Number is like one step smaller than Intel's equivalent. So TSMC 7nm DUV is roughly Intel 10nm.
And to the point the OP was asking, I don't think there is a technical problem to 3nm, or even 2nm process size. Expect this year's iPhone A Series SoC to be on 7nm EUV, 5nm in 2020, 3nm in 2022, likely 2nm in 2024 / 2025.
There may be a 5nm+ and 3nm+ in between those. Or as TSMC's CEO Joked, expect to see 5.5nm in the future.
We don't have a technical barrier, we do have an economical / cost barrier. With every node progression near to doubling of design cost, not everyone can afford to be on leading node. [1] The extremetech article is an easy to read version of Semi Engineering [2], if we assume the number are correct ( I do think the number are little exaggerated ) $500M for 5nm. Apple will need to find a $2.5 BOM reduction per iPhone to off set that cost. Qualcomm will have to sell their chip $5 to $10 more expensive. Now if you imagine $1B for 3nm, and $2B+ for 2nm.
Unless you are Apple, who can easily hike the price by another $100. For others like Qualcomm, this is going to create lots of problems unless they could spread the design cost over many more units.
[1] https://www.extremetech.com/computing/272096-3nm-process-nod...
[2] https://semiengineering.com/big-trouble-at-3nm/