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Intel Stockpiling 10nm Chips

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Re: Intel Stockpiling 10nm Chips

#3
What are Intel and other semiconductors planning to pivot to when they can no longer reduce process size at a reasonable pace (i.e. now)? Is there a plan, or is it an existential wall?

Re: Intel Stockpiling 10nm Chips

#6
post #3

What are Intel and other semiconductors planning to pivot to when they can no longer reduce process size at a reasonable pace (i.e. now)? Is there a plan, or is it an existential wall?

It seems like they plan to shift to novel hybrid architectures, at least if things like Intel owning Altera mean anything. I'd expect them to be doing things like putting neural network accelerators down and the like.

Or everyone has to make a dramatic leap to a new underlying computing physics, like the quantum dot transistor or the vacuum transistor [1] that lets them increase frequency or lower power consumption. If you double the clock frequency, I believe this still linearly increases the computing throughput, though I'm not expert enough to know if that's still strictly true.

[1] https://spectrum.ieee.org/semiconductors/devices/introducing...

Re: Intel Stockpiling 10nm Chips

#7
post #3

What are Intel and other semiconductors planning to pivot to when they can no longer reduce process size at a reasonable pace (i.e. now)? Is there a plan, or is it an existential wall?

I think Intel is trying to grow drones (an emerging market) and cloud departments.

And in general, the end of process size reduction doesn't mean the end of innovation in chip building and design. There are limits on node sizes, as there are limits on heat dissipation, but once you have high enough yield, there are few limits onto how many circuits you put onto a chip, as long as most of the circuits are powered off. Ultimately, the more stuff special purpose circuits compute instead of the general purpose one, the better for power consumption.

Re: Intel Stockpiling 10nm Chips

#8

Stockpiling chips so partners can test them later? If the point is to validate designs, wouldn't you want to do the testing before the stockpiling?

It's not so the partner can test/validate the cpu, it's so the partners can test/validate their designs using the cpu. i.e. It's hard to test/validate a laptop design if no CPUs exist that work with it.

Re: Intel Stockpiling 10nm Chips

#9
post #6
post #3

What are Intel and other semiconductors planning to pivot to when they can no longer reduce process size at a reasonable pace (i.e. now)? Is there a plan, or is it an existential wall?

It seems like they plan to shift to novel hybrid architectures, at least if things like Intel owning Altera mean anything. I'd expect them to be doing things like putting neural network accelerators down and the like. Or everyone has to make a dramatic leap to a new underlying computing physics, like the quantum dot transistor or the vacuum transistor [1] that lets them increase frequency or lower power consumption.…

A big problem with increasing the clock speed is that your processor still needs to wait for the DRAM to respond. Modern processors are crazy smart about prefetching, caching, and running instructions in parallel, but at some point Memory bandwidth and latency begin to dominate over CPU clock speed. Many players have started looking at puting multiple dies on the same substrate with high-speed interconnects to reduce memory latency and improve throughput. Those improvements could help push the usefulness of higher clocks a bit further.

Re: Intel Stockpiling 10nm Chips

#10
post #3

What are Intel and other semiconductors planning to pivot to when they can no longer reduce process size at a reasonable pace (i.e. now)? Is there a plan, or is it an existential wall?

TSMC is already doing risk 5nm production and 3nm seems entirely viable. We won't see a 'wall' until sometime after 3nm (~2025). Depending on whom you talk to, 2nm and smaller process sizes are also viable. I wouldn't expect any serious shift away from silicon processes till 2030.
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