Live data from Hacker News

Sparc removal

lists.debian.org

21–30 of 43 posts

Re: Sparc removal

#23
post #10

I spent a lot of time in the past few months trying to fix enough of the issues with Debian/SPARC to keep it from having to be removed. Honestly the port isn't in terrible shape. The specific problems listed as reasons for removing it are exaggerated. GCC is not dropping 32-bit SPARC code generation and the kernel works well overall. There were a few issues causing a lot of breakage, in particular, a register corrupt…

> The real issue is that Debian has high expectations that take maintenance to fulfill.

Without meaning to diminish your insightful post and good point: as a Debian user, I have to say, this does not sound like an issue to me.

Re: Sparc removal

#24
post #10

I spent a lot of time in the past few months trying to fix enough of the issues with Debian/SPARC to keep it from having to be removed. Honestly the port isn't in terrible shape. The specific problems listed as reasons for removing it are exaggerated. GCC is not dropping 32-bit SPARC code generation and the kernel works well overall. There were a few issues causing a lot of breakage, in particular, a register corrupt…

> The real issue is that Debian has high expectations that take maintenance to fulfill. Without meaning to diminish your insightful post and good point: as a Debian user, I have to say, this does not sound like an issue to me.

Sorry if it wasn't clear but I specifically meant the issue for the sparc port. I was not criticizing Debian in any way.

Re: Sparc removal

#25

what about openSPARC, one of the only truly open cpu designs one can load into an fpga

And the Gaisler Aeroflex cores that are both open-source and fabbed onto boards they sell. People who want open hardware can get a bit closer with a 4-core SPARC board. :)

Re: Sparc removal

#26
What trips me out about this is that SPARC is one of the most open of the legacy ISA's. It doesn't have so much baggage like Intel. It's RISC. It's documented well even for firmware writers, unlike Intel's black boxes. The license to use the name cost $100 rather than ~$1 mil for MIPS or $1-15mil for ARM. The top, proprietary offerings scream with performance and reliability. There are also multiple open-source versions that can run on FPGA's and one which gets fabbed. And, unlike OpenRISC or RISC-V, you get a whole ecosystem of code and toolsbuilt for the architecture.

Now, I understand people not buying it for desktops when they want to run browsers, flash, etc. However, it's strange for a crowd (Linux in general) that's historically about promoting openness and fighting black boxes to have so little uptake of an ISA like SPARC. Then a popular one drops it due to nobody maintaining it. A demand side of the equation like that is why few companies build or open better ISA's. The vendors think most are all talk and no wallet on the issue if it's about hardware.

Re: Sparc removal

#27

> HE, we had sex in Debian for many years, yes, before I put a stop to it Could someone explain wtf this means?

It's an email signature in poor taste, referring to a very old package intentionally named to be in equally poor taste: http://archive.debian.org/debian/pool/main/s/sex/

This kind of thing shouldn't be in an email signature at all, but especially not in a mail sent to a widely distributed announcement list.

Re: Sparc removal

#28

What trips me out about this is that SPARC is one of the most open of the legacy ISA's. It doesn't have so much baggage like Intel. It's RISC. It's documented well even for firmware writers, unlike Intel's black boxes. The license to use the name cost $100 rather than ~$1 mil for MIPS or $1-15mil for ARM. The top, proprietary offerings scream with performance and reliability. There are also multiple open-source versi…

Having learned SPARC assembly in the past, it most certainly does have a pile of backward-compatibility baggage of its own. For instance, https://en.wikipedia.org/wiki/Delay_slot

Re: Sparc removal

#29
post #14

> HE, we had sex in Debian for many years, yes, before I put a stop to it Could someone explain wtf this means?

Probably related to the "Simple editor for X".

It's one of those old "jokes", like the SEX instruction: https://en.wikipedia.org/wiki/SEX_(computing)

Re: Sparc removal

#30

What trips me out about this is that SPARC is one of the most open of the legacy ISA's. It doesn't have so much baggage like Intel. It's RISC. It's documented well even for firmware writers, unlike Intel's black boxes. The license to use the name cost $100 rather than ~$1 mil for MIPS or $1-15mil for ARM. The top, proprietary offerings scream with performance and reliability. There are also multiple open-source versi…

Having learned SPARC assembly in the past, it most certainly does have a pile of backward-compatibility baggage of its own. For instance, https://en.wikipedia.org/wiki/Delay_slot

It's really not all that bad, there's also the cache coloring and memory ordering stuff, but it's well documented at least. There is a lot more historical baroque stuff about x86, like int 80, syscall, or sysenter? For extra credit how do you find-out and are you sure your approach works on Cyrix and Via too?
Post reply on HN