Anyone who cares about this topic is welcome to contribute to https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for... I started it at the request of some HN users, and I hope it continues to hopefully enlighten some software folks who wonder how the CPU they rely on actually works.
I'll rant for a moment here, because I think this is something that the Simple CPU link has the potential to get right, and that I think is a common pitfall with digital design tutorials. I think one of the pain points that you commonly see with tutorials is the concept that the hard part is the language. As a digital designer, I think that's explicitly not the case: just like teaching functional programming, the syn…
- Being able to think parallel. Software is sequential by default, HDL is parallel by default.
- Understanding what you want to build. If you can't draw what you want, you probably can't write good HDL. There's a reason it's called Hardware Description Language, and not "JS2GATES". In a sense, HDL is really just text-based schematics.
Case in point:
http://www.allaboutcircuits.com/vol_5/chpt_7/8.html
When you think "HDL" you probably think of Verilog or VHDL, but SPICE netlists is also an HDL.