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The C10M problem

c10m.robertgraham.com

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Re: The C10M problem

#111

Post by mcguire »

Shorel wrote: post #86
dbenhur wrote: post #43

Earlier quoted context omitted.

> when languages like Python and Ruby can be over 100x slower than other high level languages You said a wrong thing. Java is a far cry from a high-level language. Javascript is arguably a high-level language however, and meaningless benchmarks (aka "damn lies") attest V8 is in spitting distance of Java. http://benchmarksgame.alioth.debian.org/u32/javascript.php Scala is much higher level than Java, compiles to the s…

We can revive the old 'language generations' concept I was taught in school: - First generation: binary opcodes entered by hand. - Second generation: Assembler languages. - Third generation: Compiled languages like C++. - Fourth generation: Interpreted high level like Python and Ruby. Also SQL. - Fifth generation: There's no such thing. Or may be Apple's Siri is. Java seems to be in a "3.5" generation, if that thing…

Or, we can just call them all "programming languages" and evaluate them on their individual strengths and weaknesses.

Re: The C10M problem

#112

Post by Scaevolus »

erichocean wrote: post #102
Scaevolus wrote: post #101

Earlier quoted context omitted.

A lot of these features sound similar to MinimaLT: http://cr.yp.to/tcpip/minimalt-20130522.pdf Do you have explicit DoS protections?

That paper (as well as CurveCP) was definitely a huge inspiration for what I'm doing. A big difference is I'm not running a packet scheduler (e.g. Chicago). Frankly, our data rate on a per device basis is just minuscule, and our internal protocol has back pressure built into it anyway, so I just skipped that part. If it becomes an issue (unlikely), I'll of course actually add an explicit scheduler so our UDP traffic…

It's interesting how much you can streamline a protocol for a single use case. Did you retain the crypto mostly intact-- including the PFS?

Re: The C10M problem

#113

Post by rdtsc »

nkurz wrote: post #104
rdtsc wrote: post #30

Earlier quoted context omitted.

Linux will often still schedule kernel threads to run on those cores so they are not totally isolated. Also cache effects. If your architecture shares caches between cores, sometimes it would be worth "wasting" a neighboring core to avoid ssh and gdb thrashing your cache. Oh and also don't forget to set up IRQ affinity to avoid any of those cores to handle. There is an interesting research done by Siemens, that takes…

Oh and also don't forget to set up IRQ affinity to avoid any of those cores to handle. Perhaps this is what you meant, but this is straightforward. Simply disabling 'irqbalance' is a simple way to do this. Alternatively, you can also configure it to cooperate with 'isolcpus' by using 'FOLLOW_ISOLCPUS'.

Disabling it will disable auto-balancing it, it will just become static, which might not be the exact configuration you want.

Re: The C10M problem

#114

Post by nkurz »

rdtsc wrote: post #113
nkurz wrote: post #104

Earlier quoted context omitted.

Oh and also don't forget to set up IRQ affinity to avoid any of those cores to handle. Perhaps this is what you meant, but this is straightforward. Simply disabling 'irqbalance' is a simple way to do this. Alternatively, you can also configure it to cooperate with 'isolcpus' by using 'FOLLOW_ISOLCPUS'.

Disabling it will disable auto-balancing it, it will just become static, which might not be the exact configuration you want.

Yes, if you don't want all interrupts to handled by CPU0 you'll need a different approach. But doing anything else may be more difficult than it sounds. Do you know if the bug mentioned here is fixed?

http://serverfault.com/questions/380935/how-to-ban-hardware-...

http://code.google.com/p/irqbalance is 403 for me and I haven't been able to check.

Re: The C10M problem

#115

Post by rdtsc »

nkurz wrote: post #114
rdtsc wrote: post #113

Earlier quoted context omitted.

Disabling it will disable auto-balancing it, it will just become static, which might not be the exact configuration you want.

Yes, if you don't want all interrupts to handled by CPU0 you'll need a different approach. But doing anything else may be more difficult than it sounds. Do you know if the bug mentioned here is fixed? http://serverfault.com/questions/380935/how-to-ban-hardware-... http://code.google.com/p/irqbalance is 403 for me and I haven't been able to check.

Setting IRQ affinity for network controllers to either follow or not follow the "high priority" processes seems to do the trick.

I usually do stuff described here:

https://cs.uwaterloo.ca/~brecht/servers/apic/SMP-affinity.tx...

And sometimes following ends up better (same cache), sometimes isolating ends up being better.

Re: The C10M problem

#116

Post by ksec »

lukego wrote: post #84
MrBuddyCasino wrote: post #83

Earlier quoted context omitted.

I'm clueless, so I'll just ask: is this made for software-defined networking?

No. Honestly, software defined networking is the idea of replacing all of your networking staff with a very clever distributed Java program. Half the world thinks this is genius and the other half thinks it's a facepalm. Network Functions Virtualization is the idea of replacing networking boxes (Cisco, Juniper, Ericsson, F5, ...) with virtual machines running on your own PCs. This is basically a "private cloud" but w…

That's interesting because i have always thought SDN are what you are describing as NFV.
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