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Web server for Linux written in amd64 assembly

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41–50 of 59 posts

Re: Web server for Linux written in amd64 assembly

#41
post #12

Pretty neat! It's awesome how assembly these days is reasonably high level: https://github.com/nemasu/asmttpd/blob/master/http.asm It dawns on me why we couldn't have shortcuts for several patterns that show up everywhere: - mov, mov, mov then call/syscall could just be written as call(arg, arg, arg) since it's not that difficult to figure out which argument needs to go to which register if there was a defined order…

> It's awesome how assembly these days is reasonably high level: There were macro assemblers already available in the 80's!

Also CISC instruction sets (VAX, 68k) were already pretty high-level.

Re: Web server for Linux written in amd64 assembly

#42
post #24

Earlier quoted context omitted.

This decade :) For modern out-of-order CPUs - xor reg1,reg2 is problematic because the result depends on the previous contents of the register. Hence it cannot be executed out of order. However as a special case xor reg1,reg1 (along with sub reg1,reg1) will be detected by the cpu (intel anyway) as a 'zero idiom' instruction and because it has a smaller opcode than mov reg,0 its preferred. There are also other complex…

>This decade :) The initial claim was that mov reg,0 was slower to execute.

Smaller opcodes will, all else being equal, take up fewer instruction decide cycles and less space in the CPU cache.

Re: Web server for Linux written in amd64 assembly

#43
post #31
post #30

I'm surprised that asmhttpd doesn't use sendfile(2) anywhere. Isn't that the fastest way to send a file to a socket?

Yeah, I'll be switching over to sendfile and getting rid of the large read/write buffers. So much cleaner and simpler ( and faster? ).

and faster?

You'll get way more bang for your buck by minimizing userspace→kernel round trips and memory copies than by hand-optimizing assembler code. sendfile is one great way to do this.

You'll get even more bang for your buck by eliminating the kernel from the packet processing path by using netmap, PF_RING/DNA, or DPDK, and a user-space TCP/IP stack.

Assembly only really helps alleviate GCC's moronic decisions resulting in excessive stack spills and alignment-unaware loads & stores.

Something about carts and horses.

Re: Web server for Linux written in amd64 assembly

#45
post #29

Earlier quoted context omitted.

> x86 bytecode What?!

I guess he's talking about Borland's Turbo Assembler that was coming with Turbo Pascal: http://en.wikipedia.org/wiki/Turbo_Assembler

My remark was because the OP used bytecode to describe assembly opcodes.

Re: Web server for Linux written in amd64 assembly

#46
post #3

xor rax,rax I used this construct often to zero a register, in the time that memory and CPU cycles were scarce. But nowadays, my time is a more valuable resource, and I tend to write: mov rax, 0 It takes a somewhat longer instruction code, and a few CPU cycles more, but it conveys meaning better.

Personally I find the xor form easier to follow, it's SUCH a long-standing convention that if I saw a mov rax, 0 I would wonder what was going on.

same here. _but_ if you weren't proficient in writing and reading asm the statement would no longer be true.

now, you could argue if that were that the case, wth is that person doing there anyway.

also if you compile something like `return 0;` it used to be compiled down to `xor eax,eax; ret;`, but meh barely anyone i know coding these days even knew this to begin with.

Re: Web server for Linux written in amd64 assembly

#48
post #24

Earlier quoted context omitted.

This decade :) For modern out-of-order CPUs - xor reg1,reg2 is problematic because the result depends on the previous contents of the register. Hence it cannot be executed out of order. However as a special case xor reg1,reg1 (along with sub reg1,reg1) will be detected by the cpu (intel anyway) as a 'zero idiom' instruction and because it has a smaller opcode than mov reg,0 its preferred. There are also other complex…

>This decade :) The initial claim was that mov reg,0 was slower to execute.

A CPU cycle is Fetch,Decode,Execute,Writeback. The 'zero idiom' instructions do not consume any 'Execute' resources. Apart from this.. as the other poster said, smaller opcodes means more instructions can fit inside the caches.

Re: Web server for Linux written in amd64 assembly

#49

Earlier quoted context omitted.

Indeed, I pretty much learned programming on the C64 using Turbo Assembler which had macro functionality.

AFAIK the Turbo Assembler was producing x86 bytecode, how would that work?

You must be confusing Turbo Assembler on the Commodore 64 with something else, the C64 used an 8-bit cpu called 6510

Re: Web server for Linux written in amd64 assembly

#50
post #12

Earlier quoted context omitted.

> It's awesome how assembly these days is reasonably high level: There were macro assemblers already available in the 80's!

Indeed, I pretty much learned programming on the C64 using Turbo Assembler which had macro functionality.

I learned assembly on the Atari 8-bit (like the C64 and AII, all of which used a variant of the Motorola 6502) which had an assembler named MAC/65. MAC, of course, was short for macro. This was in the early 80's also. Good times.

http://en.wikipedia.org/wiki/MAC/65

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