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FPGA x86 Processor

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31–39 of 39 posts

Re: FPGA x86 Processor

#31
post #5

My god, the ability to use this for tracing code makes me more excited than anything I've seen in a while. The debugging facilities on x86 are, well, limited to the point of being damn near useless. I may spend some time hacking solid trace functionality into this, if it ends up being an open core.

For an undergrad OS course, we had to build an OS from scratch. Part of that was doing the dance to get from real mode to protected mode. We had a bug in our boot loader that we were pretty stumped with; to solve it, we ended up hacking debugging printfs into the "CPU" inside QEMU and found the problem very quickly.

I don't want to be working at that level every day but it sure was a fun project.

Re: FPGA x86 Processor

#32

Good luck, this is very, very hard Why? Having tested an x86 processor from a 3rd party manufacturer (not the big ones, and not even the 2nd league) - Bios. Including ACPI stuff. So Windows XP would boot, with linux some would boot, some would work but with instabilities, some would not boot - Minor incompatibilities and every nook and cranny of the x86 spec. - Drivers for everything your board does different - The x…

Just reuse SeaBIOS like QEMU and KVM do! http://www.seabios.org/SeaBIOS

Re: FPGA x86 Processor

#33
post #25

Earlier quoted context omitted.

That's the one! I happen to have what is a fairly complete collection of all of the 'chip' VAX cpus (for Qbus) starting with the KA610 (MicroVAX I), through the KA692 (VAX 4000/700a), and its fascinating to watch the architecture go from a nearly pure microcode implementation to a nearly pure 'gate' implementation. From the perspective of looking at the tradeoffs of microcode vs gates it is really an excellent tutori…

If we want a microcoded architecture, I'd prefer the PDP-10, but that's me. How much more complex is a mostly-microcode VAX implementation compared to a MIPS? The point about being able to move stepwise up the hardware complexity ladder by progressively replacing microcode with gates is a really good one, though.

> I'd prefer the PDP-10

yeah, or a Foonly...

Re: FPGA x86 Processor

#35
post #30

Most of the implementation is based on Zet http://zet.aluzina.org/index.php/Zet_processor and cpu86 http://www.ht-lab.com/freecores/cpu8086/cpu86.html as mentioned in the project description. The Zet implementation can already run several DOS games on a pretty low-end FPGA board like the DE1, but only does the older 16-bit instructions. Not sure what he tries to accomplish, but it seems like a small system based on a…

ya, I have posted that several times here but I keep getting shadow banned for some reason. here is my implementation of Zet PC-XT SoC that I did like 4 years ago. https://github.com/donnaware/ZBC---The-Zero-Board-Computer

Re: FPGA x86 Processor

#36

Good luck, this is very, very hard Why? Having tested an x86 processor from a 3rd party manufacturer (not the big ones, and not even the 2nd league) - Bios. Including ACPI stuff. So Windows XP would boot, with linux some would boot, some would work but with instabilities, some would not boot - Minor incompatibilities and every nook and cranny of the x86 spec. - Drivers for everything your board does different - The x…

It looks like he only wants to emulate 8086, so ACPI and booting Windows/Linux are not a possibility. Not saying that its simple to implement an 8086, but it should be significantly easier than implementing an 80386/80486 (which is what one would expect today as a minimum when referring to it as x86).

Aah that changes the picture

Maybe he can boot FreeDOS then (not sure if it uses i386 mode, probably not)

It would be nice to boot, to show something, maybe even play an old game

Re: FPGA x86 Processor

#37
post #5

My god, the ability to use this for tracing code makes me more excited than anything I've seen in a while. The debugging facilities on x86 are, well, limited to the point of being damn near useless. I may spend some time hacking solid trace functionality into this, if it ends up being an open core.

So in my day to day job I'm actually a component design engineer working mostly on design validation at a company that's "involved" in x86 development. I'm sort of curious, what debugging features are you hoping for or what's missing that's negatively impacting your workflow?

Honestly, when I'm debugging hardware where I have the high level specifications, the microarchitecture spec and the system verilog files that implemented the design it's still kind of a pain to trace things.

The other downside of having all the signals is that little things can be unintentionally misleading. As an example I was working with coworker trying to trace a memory transaction through some complicated logic blocks and there was a point we originally missed where the bottom few bits of an address aren't necessary for the hardware. Later after this point the bottom bits were reused to communicate transaction properties along with the significant address bits. There was a bit of confusion about why we were reading a "bad address" before we realized what happened.

Re: FPGA x86 Processor

#38
post #5

My god, the ability to use this for tracing code makes me more excited than anything I've seen in a while. The debugging facilities on x86 are, well, limited to the point of being damn near useless. I may spend some time hacking solid trace functionality into this, if it ends up being an open core.

For an undergrad OS course, we had to build an OS from scratch. Part of that was doing the dance to get from real mode to protected mode. We had a bug in our boot loader that we were pretty stumped with; to solve it, we ended up hacking debugging printfs into the "CPU" inside QEMU and found the problem very quickly. I don't want to be working at that level every day but it sure was a fun project.

I remember dumping registers to text-mode screen memory so that I wouldn't waste a register. Half of the result landed in the color values, so sometimes I couldn't read all of the value because it was flashing green on green. I prefered Bochs' Port E9 hack.

Oh, OS courses at the university... good old time. (Some participants complained that going from zero to bare-metal x86 was too difficult.)

Re: FPGA x86 Processor

#39
post #30

Most of the implementation is based on Zet http://zet.aluzina.org/index.php/Zet_processor and cpu86 http://www.ht-lab.com/freecores/cpu8086/cpu86.html as mentioned in the project description. The Zet implementation can already run several DOS games on a pretty low-end FPGA board like the DE1, but only does the older 16-bit instructions. Not sure what he tries to accomplish, but it seems like a small system based on a…

ya, I have posted that several times here but I keep getting shadow banned for some reason. here is my implementation of Zet PC-XT SoC that I did like 4 years ago. https://github.com/donnaware/ZBC---The-Zero-Board-Computer

will have a look at this :-)
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