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The 6502 CPU's overflow flag explained at the silicon level

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Re: The 6502 CPU's overflow flag explained at the silicon level

#11

Post by Breakthrough »

js2 wrote: post #7
melling wrote: post #3

Earlier quoted context omitted.

How did you come up with 1000x? With Moore's law we are only 3 orders of magnitude better than a processor from the late 1970s?

The 6502 ran at 1 MHz in the Apple ][. Modern processors run at 1 GHz (1000 MHz) and above. That's 1000x, which is 3 orders of magnitude.

Not to mention further performance advancements in processor design since then (pipelining, SIMD, etc...), further increasing throughput above the 1000x threshold. One should also consider the increases in word length, adding the ability to process more data in less time.

Re: The 6502 CPU's overflow flag explained at the silicon level

#12

Post by Symmetry »

melling wrote: post #3
raverbashing wrote: post #2

Very interesting And this is 30 year old tech. The 6502, the processor in you cell phone is about 1000x faster than it (and much more capable) To me the hardest part (apparently) is converting the electronic circuit to the actual chip drawings. Not sure how this is done (how do you route it). And this was done by hand in the 6502, the drawings were done the size of a desk and reduced photographically. (IIRC)

How did you come up with 1000x? With Moore's law we are only 3 orders of magnitude better than a processor from the late 1970s?

As others have pointed modern processors are three orders of magnitude faster in terms of clockspeed than processors from back then. There's also the fact that modern processors do a lot more per clock than this guy: using 64-bit wide datapaths, and executing multiple instructions every clock cycle rather than taking multiple clock cycles to execute an instruction, and having multiple independent cores. One rule of thumb is that your performance tends to increase with the square root of the number of transistors you use so you'd expect another 3 orders of magnitude increase in performance from the 6 orders of magnitude more transistors, for a modern chip being 6 orders of magnitude faster at executing some algorithm overall (if there's a normal amount of parallelism to extract).

Now, normally you have to worry about increasing clockspeeds having diminishing returns, since memory latency remains constant despite a faster CPU clock. But anything that could run on the amount of RAM the 6502 could handle would fit in a modern processor's L1 cache, and the scheduler is perfectly able to hide L1 latency so I think ignoring this factor is fair in this case.

Re: The 6502 CPU's overflow flag explained at the silicon level

#13

Post by meaty »

Breakthrough wrote: post #11
js2 wrote: post #7

Earlier quoted context omitted.

The 6502 ran at 1 MHz in the Apple ][. Modern processors run at 1 GHz (1000 MHz) and above. That's 1000x, which is 3 orders of magnitude.

Not to mention further performance advancements in processor design since then (pipelining, SIMD, etc...), further increasing throughput above the 1000x threshold. One should also consider the increases in word length, adding the ability to process more data in less time.

Yet it's a shame that we seem to piss that extra performance away instantly in software.

Things felt faster in the 80's than they did now, even doing the same tasks.

Re: The 6502 CPU's overflow flag explained at the silicon level

#14

Post by mikeash »

meaty wrote: post #13
Breakthrough wrote: post #11

Earlier quoted context omitted.

Not to mention further performance advancements in processor design since then (pipelining, SIMD, etc...), further increasing throughput above the 1000x threshold. One should also consider the increases in word length, adding the ability to process more data in less time.

Yet it's a shame that we seem to piss that extra performance away instantly in software. Things felt faster in the 80's than they did now, even doing the same tasks.

I recall waiting a couple of minutes for my computer to just boot in the 80s. When I want to use my phone, it becomes usable in well under a second.

Waiting a few seconds every time I hit save was fun. Didn't stop me from developing a ferocious ^S reflex. Fortunately, save is fast enough not to be noticeable these days, to the extent that it usually happens automatically now.

Watching a WYSIWYG font menu draw each individual entry was fun. We certainly don't get that pleasure now.

But yes, things certainly felt faster in the 80s.... /s

Re: The 6502 CPU's overflow flag explained at the silicon level

#15

Post by meaty »

mikeash wrote: post #14
meaty wrote: post #13

Earlier quoted context omitted.

Yet it's a shame that we seem to piss that extra performance away instantly in software. Things felt faster in the 80's than they did now, even doing the same tasks.

I recall waiting a couple of minutes for my computer to just boot in the 80s. When I want to use my phone, it becomes usable in well under a second. Waiting a few seconds every time I hit save was fun. Didn't stop me from developing a ferocious ^S reflex. Fortunately, save is fast enough not to be noticeable these days, to the extent that it usually happens automatically now. Watching a WYSIWYG font menu draw each in…

I don't know what you were using but I was booted and operational in under 3-4 seconds on everything I used in the 80s (BBC Master, Acorn A310)

Re: The 6502 CPU's overflow flag explained at the silicon level

#16

Post by sp332 »

raverbashing wrote: post #2

Very interesting And this is 30 year old tech. The 6502, the processor in you cell phone is about 1000x faster than it (and much more capable) To me the hardest part (apparently) is converting the electronic circuit to the actual chip drawings. Not sure how this is done (how do you route it). And this was done by hand in the 6502, the drawings were done the size of a desk and reduced photographically. (IIRC)

You can watch it work here! (warning: epic javascript) http://www.visual6502.org/JSSim/expert.html

Re: The 6502 CPU's overflow flag explained at the silicon level

#17

Post by to3m »

Breakthrough wrote: post #11
js2 wrote: post #7

Earlier quoted context omitted.

The 6502 ran at 1 MHz in the Apple ][. Modern processors run at 1 GHz (1000 MHz) and above. That's 1000x, which is 3 orders of magnitude.

Not to mention further performance advancements in processor design since then (pipelining, SIMD, etc...), further increasing throughput above the 1000x threshold. One should also consider the increases in word length, adding the ability to process more data in less time.

If you want to add 2 32-bit integers, on 6502 you'll need something like the following, assuming this is a 32-bit integer you're actively working with and are probably about to use again fairly soon:

    CLC                  ; 2
    LDA&70 ADC&74 STA&70 ; 3 3 3 = 9
    LDA&71 ADC&75 STA&71 ; 3 3 3 = 9
    LDA&72 ADC&76 STA&72 ; 3 3 3 = 9
    LDA&73 ADC&77 STA&73 ; 3 3 3 = 9
That's for a total of 38 cycles. So on the computer I started programming on, you could do ~52,000 32-bit adds per second.

By comparison, for a modern Pentium, according to Intel's docs, a 32-bit add (again, on data you're using) takes 1 cycle, end to end.

    ADD ESI,EDX
So on the laptop that's in front of me, which is a crap one, you could do 2,530,000,000 32-bit adds per second. A 48,000-fold performance increase. Maybe 96,000 times, if you have no dependency chain (ADD throughput is 2 per cycle).

This ignores the fact my modern computer has 2 cores.

Re: The 6502 CPU's overflow flag explained at the silicon level

#18

Post by jeffbarr »

I loved that chip!

My first real programming job entailed writing a blazingly macro assembler from scratch for the 6502, using a much slower (and non-macro) assembler from the vendor (Ohio Scientific, for those of a certain age).

I simulated the proposed hashing algorithm in FORTRAN at the community college I was attending, and found that it led to a lot of collisions for the base 6502 opcode set. When I pointed this out to my manager (who's still my friend 32+ years on), he made sure that I got my first raise.

I still have those listings and the original design documents around somewhere.

Re: The 6502 CPU's overflow flag explained at the silicon level

#19

Post by zxcdw »

melling wrote: post #3
raverbashing wrote: post #2

Very interesting And this is 30 year old tech. The 6502, the processor in you cell phone is about 1000x faster than it (and much more capable) To me the hardest part (apparently) is converting the electronic circuit to the actual chip drawings. Not sure how this is done (how do you route it). And this was done by hand in the 6502, the drawings were done the size of a desk and reduced photographically. (IIRC)

How did you come up with 1000x? With Moore's law we are only 3 orders of magnitude better than a processor from the late 1970s?

The x1000 is a huge understatement. For example these days CPUs are much more optimal in terms of cycles per instruction and inversely instructions per cycle. Back then when multiplication of two word-sized(8 bits back then) values took 24 cycles, these days we can do that in 12 cycles for 64-bit values. Because of superscalar processing and thus instruction level parallelism, we can typically do 2-4 ALU operations in parallel(given that there's no data dependencies) and thus increase the instruction throughput 2-4 fold. Then, because of SIMD features and data level parallelism we can do same operaton on multiple data(say, operate on a vector of 4 elements in a single cycle) and thus we eliminate the need for repeated instructions.

This all gets a bit complicated in modern days because of memory access costs and caches which try to alleviate the costs, but the idea is that modern CPUs are likely to be around 10 times as fast per-clock as 6502 and because of multiple cores and threads that value goes to something like 40-60. Add the huge increase in clock speed and you're a bit south from x100_000 in optimal case.

I would hope every programmer would write some core on a C64 to really learn how much RAM the 64 KB really is. You can actually waste some of it and in some cases it really is "enough so that I don't have to optimize". :) Real hard-core people would go with VIC-20 which as only 5120 bytes of RAM, or Atari 2600 with 128 bytes of RAM. One could imagine there's nothing you can do with them but oh boy how wrong one would be! Heck, a single tweet is 140 characters. And you can fit that in 128 bytes. You really can... :)

Re: The 6502 CPU's overflow flag explained at the silicon level

#20

Post by js2 »

to3m wrote: post #17
Breakthrough wrote: post #11

Earlier quoted context omitted.

Not to mention further performance advancements in processor design since then (pipelining, SIMD, etc...), further increasing throughput above the 1000x threshold. One should also consider the increases in word length, adding the ability to process more data in less time.

If you want to add 2 32-bit integers, on 6502 you'll need something like the following, assuming this is a 32-bit integer you're actively working with and are probably about to use again fairly soon: CLC ; 2 LDA&70 ADC&74 STA&70 ; 3 3 3 = 9 LDA&71 ADC&75 STA&71 ; 3 3 3 = 9 LDA&72 ADC&76 STA&72 ; 3 3 3 = 9 LDA&73 ADC&77 STA&73 ; 3 3 3 = 9 That's for a total of 38 cycles. So on the computer I started programming on, yo…

And that's loading/storing to/from the zero page (the first 256 bytes of memory). Loading/storing from higher addresses requires 4 cycles.

But, "ADD ESI,EDX" is adding two registers isn't it? So I think you need to include the loading/storing of those registers back to memory for a more fair comparison.

I haven't touched 6502 assembly in over 20 years. Brings back memories. :-)

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