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Show HN: Copperhead – Cursor for circuit boards

copperhead.sh

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Re: Show HN: Copperhead – Cursor for circuit boards

#51

Earlier quoted context omitted.

NP-hard problems are still NP-hard even with magical LLM pixie sprinkles. =3

If the magic LLM pixie sprinkles can brute force their way to a solution using viable heuristics and their training data, I will use them.

NP-Hard is NP-hard... "heuristics" in this case is just a euphemism for a fantasy cost-function to scam shareholders.

It is a named problem, and can't be misappropriated like the $9Tn worth of FOSS code "AI" scraped and compacted for isomorphic plagiarism tokens. =3

Re: Show HN: Copperhead – Cursor for circuit boards

#52
Interested in the evaluations of anyone actually using this.

I tested over the weekend and Astra can

- create and modify schematics from instructions - place components and route traces

out of the box, just via normal 'computer use'. I'm not satisfied with the routing but it isn't terrible.

Re: Show HN: Copperhead – Cursor for circuit boards

#55

The space is definitely heating up. Flux.ai being the incumbent Silixon based out of the UK have been showing demos Quilter and DeepPCB for layout The recent OpenAI demo... I went the other way and pre-designed sub circuits with a set of rules that allows simple merge assembly, unfortunately I didn't have the time or budget to continue with it, but I took the constrained approach as with hardware, things can't be 99%…

My experience with hardware engineers, at least IRL, is very different. They love to talk about their work. However, I used to be an EE so that probably helps.

As for Reddit, there's a lot of "bury head in sand and problem will go away" behavior when it comes to AI. People are understandably worried about their jobs, but they're certainly not doing themselves any favors by downplaying AI or looking for "tech niches where AI isn't yet."

Copperhead is very interesting. I do some embedded systems consulting on the side, but I've never enjoyed PCB layout very much. I briefly investigated using AI for it the last time I had to do a board, but it wasn't very helpful.

Re: Show HN: Copperhead – Cursor for circuit boards

#56

With AI enabled consumer hardware usecases going to explode this is something super relevant. At least 5 startups have pitched their wearables to me and they could definitely use this

Design for Manufacturability (DFM) will determine if they generate a viable product. Hardware is difficult, with a success rate around 1:66 for a startup.

It is a good idea to consult with a contract manufacturer engineering team early, and stop wasting peoples time including their own.

I have also seen people re-brand China pad-printed generic products, and claim they needed investor help buying a shipping container full of cheap stuff or outright e-waste. Careful, especially if you see multiple versions or the same product pop up at the same time. Best of luck =3

Re: Show HN: Copperhead – Cursor for circuit boards

#58

Earlier quoted context omitted.

the website isn't the product. try copperhead and judge the engineering :)

The website is the marketing for the product, most people see that first, and they wont go further if your front door is festooned with goofball stuff.

fixed it!

Re: Show HN: Copperhead – Cursor for circuit boards

#59

Earlier quoted context omitted.

They're also NP-hard for the humans doing the majority of the work currently, meaning that good enough heuristics dominate as it is.

Every trace on a PCB is a traveling salesman problem with ballooning complexity. https://en.wikipedia.org/wiki/Travelling_salesman_problem While physics informed models do exist, they are still going to burn a lot of compute to generate failure modes people didn't know were possible. =3 https://www.youtube.com/watch?v=T4Upf_B9RLQ

Well, no, it's not.

If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.

Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.

And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.

Re: Show HN: Copperhead – Cursor for circuit boards

#60

Earlier quoted context omitted.

If the magic LLM pixie sprinkles can brute force their way to a solution using viable heuristics and their training data, I will use them.

NP-Hard is NP-hard... "heuristics" in this case is just a euphemism for a fantasy cost-function to scam shareholders. It is a named problem, and can't be misappropriated like the $9Tn worth of FOSS code "AI" scraped and compacted for isomorphic plagiarism tokens. =3

So, then how are today's pcb layout techs solving these Np-hard problems in your mind, armed only with Altium?
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