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A third world engineer responds to “RISC-V: They should have known better”

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Re: A third world engineer responds to “RISC-V: They should have known better”

#201

Post by strenholme »

jackb4040 wrote: post #196
strenholme wrote: post #187

I believe there will come a day when RISC-V has comparable or better performance than ARM and x86_64. This is based on history: I remember when x86 performance compared to the DEC Alpha, PA-RISC, SPARC, etc. was a joke. There was a time when, if you wanted real performance, you needed to pony up $20,000-$50,000 for a workstation with a MIPS/PA-RISC/SPARC/Alpha/whatever processor. All these workstations smoked the x86…

It's fascinating to me what you're describing. That ISA prevalence basically comes down to the anarchy of the market, and theoretical differences in the actual design don't really factor in. Is this true? Can we analyse the reasons we expect RISC-V to have better performance, and possibly even extrapolate that to a theoretically even better ISA and skip over RISC-V entirely?

Getting RISC-V to have better performance is a matter of in-chip optimizations (caches, pipelines, etc.) and high quality performance oriented fabs. The dominance of x86 after the dot-com bubble popped shows that one can get incredible performance even from an ISA which is a hack on top of a hack on top of another hack. [1]

In terms of a “theoretically even better ISA”, if anyone has any proposals, I would love to see links to them. In particular, the article “RISC-V: They Should Have Known Better” does not propose an ISA (except mentioning that the author feels AArch64 is much better), so I find its criticisms dubious.

[1] I will make one ISA propsal: x86_64 should have had 32 instead of 16 registers, but 16 registers at least is quite a bit better than the 4-8 registers the 386 had.

Re: A third world engineer responds to “RISC-V: They should have known better”

#202

Post by throwaway2037 »

overfeed wrote: post #181
bonoboTP wrote: post #171

Earlier quoted context omitted.

It's Global South now. A Global South embedded engineer.

Both the old and new forms are clumsy approximations; Trinidad & Tobago is (are?) in the northern hemisphere.

I totally agree. Trinidad & Tobago isn't a poor country. It is a petro state (oil and gas) in the Caribbean. GDP per capita is 20K USD. That is middle income.

Re: A third world engineer responds to “RISC-V: They should have known better”

#203

Post by jackb4040 »

strenholme wrote: post #201
jackb4040 wrote: post #196

Earlier quoted context omitted.

It's fascinating to me what you're describing. That ISA prevalence basically comes down to the anarchy of the market, and theoretical differences in the actual design don't really factor in. Is this true? Can we analyse the reasons we expect RISC-V to have better performance, and possibly even extrapolate that to a theoretically even better ISA and skip over RISC-V entirely?

Getting RISC-V to have better performance is a matter of in-chip optimizations (caches, pipelines, etc.) and high quality performance oriented fabs. The dominance of x86 after the dot-com bubble popped shows that one can get incredible performance even from an ISA which is a hack on top of a hack on top of another hack. [1] In terms of a “theoretically even better ISA”, if anyone has any proposals, I would love to se…

But is there any article / papers / field of study that explores the theoretical maximum of various architectures, given infinite resources? Do they begin to converge, such that a highly optimized Arm looks similar to a highly optimized RISC-V core? If we are near / past the point of diminishing returns for x86, how mathematically rigorous is our proof of that?

Re: A third world engineer responds to “RISC-V: They should have known better”

#204

Post by jasonfarnon »

adastra22 wrote: post #151
kelnos wrote: post #102

I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part". I don't get how both things can be…

[flagged]

what structure are you possibly referring to? it's a noun + adjective clause. That's why you see it hundreds of times per day.

Re: A third world engineer responds to “RISC-V: They should have known better”

#205

Post by [deleted] »

bigcat12345678 wrote: post #40
HawtAds wrote: post #4

I love the article, it's a breath of fresh air compared to the usual bay area centric takes. However there's just one issue: > The students I want to teach are in the same position, and so are the ones in Nigeria and Bangladesh It does not take $60 to ship small sub $1 chips from Asia to Nigeria/Bangladesh. These two countries are all on global trade routes (both supply and demand) and the expensive last mile deliver…

This is a bay area centric take on a non bay area centric take. The typical bay area centric take has the following vibe: 1. I am among the group of most open minded people 2. I admit mistakes, but I don't change my view, that means I may make the same mistakes next time on a different concrete cases 3. Morally I am among the least corrupted 4. I work for the moderately morally questionable firms with nice paychecks,…

[deleted]

Re: A third world engineer responds to “RISC-V: They should have known better”

#206

Post by sylware »

LeFantome wrote: post #197
acutelittlebox wrote: post #153

Earlier quoted context omitted.

the current highest performance RISC-V systems you can buy off a shelf are equivalent to a raspberry pi 5 so they're not terribly behind. in terms of IPC, currently available RISC-V cores are already basically on par with Zen 3 and Apple M1 from what i understand and Jim Keller believes that RISC-V will be the one that leads the way for raw performance.

SiFive P870 and Tenstorrent Ascalon are pretty much Zen 3. Tenstorrent is supposed to be releasing silicon soon. You can license their cores now. SiFive says customers have the P870 already but I am not sure who those are.

Are they on the latest silicon process?

Because, without neglecting the micro-architecture, we all know how critical the silicon process is for high-end performance.

Re: A third world engineer responds to “RISC-V: They should have known better”

#207

Post by sylware »

zephen wrote: post #173
PunchyHamster wrote: post #99

Earlier quoted context omitted.

There aren't ones that wouldn't be served better by ARM The improvement is entirely "we don't have to pay ARM"

> There aren't ones that wouldn't be served better by ARM Sure there are. If you want to do weird and wacky stuff, try to do it with an ARM and see how fast you get shut down. > The improvement is entirely "we don't have to pay ARM" No, it's "we don't have to beg and grovel, or pay ARM."

I guess this would be orders of magnitude more horrible with x86_64?

Re: A third world engineer responds to “RISC-V: They should have known better”

#208

Post by adastra22 »

jasonfarnon wrote: post #204
adastra22 wrote: post #151

Earlier quoted context omitted.

[flagged]

what structure are you possibly referring to? it's a noun + adjective clause. That's why you see it hundreds of times per day.

an X that VERBS in my/our LOCATION at ADJECTIVE CLAUSE

This is a really constipated sentence and there are a dozen better ways to say it. Claude loves this structure though.

Re: A third world engineer responds to “RISC-V: They should have known better”

#209

Post by sylware »

acutelittlebox wrote: post #198
AlotOfReading wrote: post #188

Earlier quoted context omitted.

5 years ago was Apple M1/M2 and AMD Zen 3. What RISC-V cores are remotely competitive with that?

from my understanding there's the SiFive P870, Tenstorrent Ascalon X, and Condor Computing Cuzco among others

All on latest silicon process?

Re: A third world engineer responds to “RISC-V: They should have known better”

#210

Post by rasz »

BirAdam wrote: post #121
initramfs wrote: post #51

"Now price the same journey on the other side, forget x86-64 and that duopoly, patent minefield, with multi-thousand dollar debug probes; we'll take a look at ARM." The 386 and 486 patent should have expired more than 20 years ago. No one tried to open source it. https://github.com/EI2030/Low-power-E-Paper-OS/blob/master/0... There were many companies that had clones in the early 90s, and I wonder whether any of them…

There’s Vortex86 and VIA. VIA’s rights came from Cyrix, and this is where Zhaoxin‘s rights come from.

VIA rights did not come from Cyrix.

Cyrix famously had to skirt IP laws by using TI and IBM foundries because those two companies had full Intel 3rd party licenses. Cyrix was sued and paid big bucks settlement just to be able to use Intels patent 338 (long expired). Later cross licensing had little to do with Cyrix, and more with National owning crapload of patents they could use to retaliate against Intel - that 1998 deal https://www.intel.com/pressroom/archive/releases/1998/CN0203... resulted in full cross licensing allowing National build straight 1:1 copies of Intel chips if they desired.

When VIA bought Cyrix from National they didnt inherit ANY of those licenses. VIA was sued just as original Cyrix and National did, and once again had to pay big bucks to settle despite just aquiring Centaur with a bunch of patents and Intel license https://www.pinsentmasons.com/out-law/news/intel-and-via-set...

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