Who uses the term '3rd world' 'third world' anymore?
It's Global South now. A Global South embedded engineer.
A third world engineer responds to “RISC-V: They should have known better”
171–180 of 350 posts
Re: A third world engineer responds to “RISC-V: They should have known better”
#172I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part". I don't get how both things can be…
[flagged]
I don't know if we should jump immediately to that conclusion. The article has plenty of tiny typographical/grammatical errors suggesting it was human written, or at the very least a human was significantly involved in the loop.
Re: A third world engineer responds to “RISC-V: They should have known better”
#173Earlier quoted context omitted.
> really crazy optimizations that they are doing Any examples of this?
There aren't ones that wouldn't be served better by ARM The improvement is entirely "we don't have to pay ARM"
> There aren't ones that wouldn't be served better by ARM
Sure there are. If you want to do weird and wacky stuff, try to do it with an ARM and see how fast you get shut down.
> The improvement is entirely "we don't have to pay ARM"
No, it's "we don't have to beg and grovel, or pay ARM."
Re: A third world engineer responds to “RISC-V: They should have known better”
#174> He derives the case for the chip and then spends the rest of the article annoyed that the chip exists. This is almost satirical. His criticisms are entirely valid, because why can't the the thing that has a free spec and will likely dominate that space ... also be good too? Can't we have all the nice things?
Because 'good' is rather subjective when it comes to ISAs.
Re: A third world engineer responds to “RISC-V: They should have known better”
#175I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part". I don't get how both things can be…
Also note: LCSC sells PY32 Arm Cortex-M0 (PY32C642-C) for half the price (0.06$) of the cheapest CH32 [CH32V005D6U6] (0.11$). Given it has half the RAM, but price matching yields a better chip for less or the same money.
STMicroelectronics also launched the STM32C0 series that is still quite cheap @ ~0.35$/piece.
However, the prices on aliexpress all mishmash so giving a correct quote is impossible as the same chip is sold at wildly different prices by different sellers.
Re: A third world engineer responds to “RISC-V: They should have known better”
#176Earlier quoted context omitted.
In the article, he addresses the issue of clones vs 1st party RISC chips on AliExpress. As a mere dabbler, I have been bit by undisclosed errata on an STM-compatible/bootleg/clone/counterfeit Arm chip while using the official STM SDK.
Sure, but that problem should exist for both ARM and RISC-V. And if it doesn't yet, it will once RISC-V becomes more popular.
> Sure, but that problem should exist for both ARM and RISC-V.
I don't know why you'd take that as a given when marquee RISC-V microcontrollers are almost universally low-cost, but Arm has pricier marquee parts, thus a bigger opportunity for undercutting the market leader on price with a cloned product.
Re: A third world engineer responds to “RISC-V: They should have known better”
#177Earlier quoted context omitted.
> really crazy optimizations that they are doing Any examples of this?
Here are a few random things I know of: * Tenstorrent Ascalon has a neat optimization for certain LMUL>1 SIMD operations. LMUL=2 effectively unrolls the SIMD operation making it read two SIMD registers from every source and write two SIMD registers to the destination. There are however some instructions where LMUL=2 only needs to write to one registers, those are narrowing instructions (e.g. 64-bit to 32-bit truncati…
>While the scalar part of OpenXiangShan looks really good, the RVV imolementation is currently basically unusable.
Good news! It seems they just opened a new PR for a new RVV implementation: https://github.com/OpenXiangShan/XiangShan/pull/6331
Re: A third world engineer responds to “RISC-V: They should have known better”
#178Earlier quoted context omitted.
> The huge number of companies building RISC-V chips and really crazy optimizations that they are doing in all kinds of spaces are a very real counterweight to your notion. I assume this is addressing > and since all the RISC-V SBCs I'm aware of have significantly worse performance and efficiency than comparably priced ARM SBCs. If so, could you point at specific SBCs that beat ARM SBC perf?
Take a look at some of the really new ones, like the Milk-V Jupiter 2 based around the SpaceMIT K3[0]. Single core is still lacking but the multi-core isn't all that far behind a pi5 (350 vs 900 single core and 1700 vs 2100 multicore in a geekbench beta version). And I will note that the other poster didn't say they beat it, just that there are lots of chips being built. I'd imagine that the cores on the tenstorrent…
The multicore is only close because the RISC-V one has twice as many cores and uses twice as much power. That would suggest the RISC-V cores are getting around pi3 levels of performance which is a decade old and losing badly as perf/W.
Re: A third world engineer responds to “RISC-V: They should have known better”
#179Earlier quoted context omitted.
The two authors also have a very different definition of what "high-end" means. Dmitry is talking about high-end application processors that you might find in a mid-range or better laptop, smartphone or server. Armstrong Subero seems to think that anything larger than a "dirt cheap microcontroller" is high-end. People shouldn't take this the wrong way, but the VexRISC-V cores in Baochip are not "high-end". They are b…
To add to what you said, I don't see any big issues with high-end prosessors and licenses. Anyone who spends $200 million to develop a completely new high-end processor microarchitecture every 3 to 5 years is not going to complain about an ARM license too much. You get freedom with $$.
If you got “freedom with $$”, there would have been no ARM/Qualcomm lawsuit.
Re: A third world engineer responds to “RISC-V: They should have known better”
#180Beautiful. I read the "They Should Have Known Better" article and forgot it. I've seen this before. I know it's hot air and does not matter, and I can't afford to worry about things that don't matter. When I say I've seen this before, I'm talking about ancient history: controversies so old and so laughable that they've been forgotten. When, for example, AMD handed the world AMD64/X86_64, the same things were said: fr…
ESP32-P31s are cheap - samples are cheap ($5-6 for WROOM modules) production prices are going to be lower - and twice the number of pins ESP32s are known for (but say goodbye to castelated modules hand soldering is going to be harder)