We are using RISC-V for AI accelerators to great success https://ai.meta.com/blog/meta-mtia-scale-ai-chips-for-billio... RISC-V was a great choice due to being so customizable and extensible.
He addresses this use case in the article.
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RISC-V: They Should Have Known Better
291–300 of 467 posts
Re: RISC-V: They Should Have Known Better
#292Earlier quoted context omitted.
Could you share a link or more details? What is this hobby CPU project?
I think the GP is talking about the Hazard3 [1] core. This is one of the CPU cores besides the ARM M33 instantiated on the RP2350 µC [2]. See this article from Luke Wren (Wren6991) back when the RP2350 came out [3]. [1] https://github.com/Wren6991/Hazard3 [2] https://www.raspberrypi.com/products/rp2350/ [3] https://www.raspberrypi.com/news/risc-v-on-raspberry-pi-pico...
What I find interesting is that RP2350 is designed as "one or the other", no way to use ARM and RISC-V concurrently, and has fuses that can kill ARM M33 cores outright.
Makes me wonder if an "ARM cores fused off, RISC-V only, no ARM fees" SKU is possible.
Re: RISC-V: They Should Have Known Better
#293So … use RISC-V as the strawman, and create a community-based RISC-6 that doesn’t have these weaknesses? Better to get in now before it becomes too solidly entrenched.
You can't make a community-based ISA, it's not possible unless you have a community-based fab. He who makes the chips makes the rules.
Err … RISC-V is an ISA without a fab?
Re: RISC-V: They Should Have Known Better
#294So … use RISC-V as the strawman, and create a community-based RISC-6 that doesn’t have these weaknesses? Better to get in now before it becomes too solidly entrenched.
Likely impossible unless you somehow come up with something vastly better (unlikely). None of these things are remotely bad enough to make the downsides of using another ISA palatable.
And yet, new ISAs arise fairly regularly, for various reasons. RISC-V itself succeeded largely because it is gratis, I think.
Re: RISC-V: They Should Have Known Better
#295Earlier quoted context omitted.
Anther ISA like ARM? It seems pretty palatable to just about everyone not academic.
You're vastly underestimating the amount of work that has gone into RISC-V that would need to be redone. It's not just a spec. There's an absolute mountain of software and hardware supporting it.
Sure. But … so was Linux, or Firefox, or GNOME or KDE, etc.
Even RISC-V itself was adopted by volunteers and supported by toolchains, and then kernels, and applications.
The amount of work is less a problem than the motivation. And motivation really just depends on recognizing that the status quo sucks, but is fixable.
Re: RISC-V: They Should Have Known Better
#296Yet it's royalty-free and good enough for Espressif (maker of ESP32) to move exclusively to the RISC V open-source instruction set architecture [1].
"Good enough ISA plus zero licensing cost" beats "perfect ISA plus royalties" in the embedded space.
Also, let's not forget that the reason the world is built on the von Neumann architecture is that it was made available for free.
[1] - https://www.eenewseurope.com/en/espressif-moves-exclusively-...
Re: RISC-V: They Should Have Known Better
#297Near the end of the essay, the author mentions that the folks at Berkeley considered OpenRISC.
Would that have been a better path do go down, to throw a bunch of work, money, and R&D after, or is there anything inherently bad about that design besides delay slots?
I kinda feel that even the smartest people will build great things on crumbling foundations as long as those foundations are available. I'm thinking of NASA embracing RISC-V or anyone who decided to write secure-by-design software in C.
*edit - rephrased question for clarity
Re: RISC-V: They Should Have Known Better
#298RISC-V is... fine. It satisfies my two requirements for an ISA as a hobby CPU designer, which are: 1. Supported in mainline LLVM and GCC. 2. I can implement it without lawyers sending me a love letter. Everything else, I can fix in post. There are enough good ideas spread across the extensions that I can assemble a reasonably put-together, curated embedded ISA with competitive performance and code density that admits…
> RISC-V is .. fine. Yeah, so was 8051 and it sucked too :-). I appreciated having this rant all in one place. Ranting against bad architecture is always cathartic and absolutely useless since the people who built and now champion the bad architecture are invested so one's rant simply irritates them. And like the parent comment here, I too find RISC-V "useful" in that it has sufficient tooling to make most everything…
> Perhaps the most interesting thing is that RISC-V shows just how ISA agnostic people are
Of course! Most people in the computing world work way higher up the ladder of abstraction. I suspect a small minority of working software engineers know what an ISA even is.
I did some contract work in web development for a time. It is staggering how few people understand how the javascript they write gets executed on the machine. People don't understand pointers, or virtual machines, or in many cases how JS bundlers work, despite using them daily.
In some ways, this is a sign that our abstraction layers have been a great success! People can program for the virtual javascript machine, without needing to understand how the actual machine works, or how it emulates javascript. Is this the future we wanted? I'm not sure. But it's here.
Re: RISC-V: They Should Have Known Better
#299> What does a cheap microcontroller core need? Let's inspect what they are used for. Typical use cases are to interface with and quickly reconfigure hardware blocks in a larger chip, eg in an MP3 player, an SD card, or a USB stick. The hard work is done by custom IP and the CPU core is just there to occasionally prod a register or configure something. This is not the only reason to use a microcontroller or 75% of mic…
This is a "microcontroller core", not a "microcontroller". We're talking "deep embedded" applications - where an ASIC is designed for a very specific purpose, and that design just so happens to call for a programmable CPU core to be included in it. This is the kind of design that lives in your keyboard, your mouse, your USB stick, your USB hub, your HDD, your SSD, your eMMC chip, your memory card and more. Remember:…
By volume, I would expect the majority of microcontroller silicon shipped to be these kinds of deeply embedded cores. They even show up in chips called “microcontrollers.”
Re: RISC-V: They Should Have Known Better
#300> What does a cheap microcontroller core need? Let's inspect what they are used for. Typical use cases are to interface with and quickly reconfigure hardware blocks in a larger chip, eg in an MP3 player, an SD card, or a USB stick. The hard work is done by custom IP and the CPU core is just there to occasionally prod a register or configure something. This is not the only reason to use a microcontroller or 75% of mic…
This is a "microcontroller core", not a "microcontroller". We're talking "deep embedded" applications - where an ASIC is designed for a very specific purpose, and that design just so happens to call for a programmable CPU core to be included in it. This is the kind of design that lives in your keyboard, your mouse, your USB stick, your USB hub, your HDD, your SSD, your eMMC chip, your memory card and more. Remember:…
Å microcontroller needs a microcontroller core.
EDIT: Leaving that Å in. For some reason, iOS on iPad is obsessed with autocorrecting "A" to "Å" even when using the English keyboard. It's driving me nuts.