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Hardware backdoors in some x86 CPUs

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Re: Hardware backdoors in some x86 CPUs

#21

Post by inigyou »

userbinator wrote: post #15
joss82 wrote: post #6

This backdoor only appears on decades-old VIA C3 embedded x86 processors

It's not even a "backdoor", it's documented in the datasheet... http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia... (page 82) ...which along with the already publicly-known microarchitecture of the C3 makes this statement sound like total nonsense: The rosenbridge backdoor is a small, non-x86 core embedded alongside the main x86 core in the CPU I remember laughing at this with a few others knowledgeable i…

Was this documentation public at the time? The pdf still does not document the instructions themselves.

Re: Hardware backdoors in some x86 CPUs

#23

Post by userbinator »

inigyou wrote: post #21
userbinator wrote: post #15

Earlier quoted context omitted.

It's not even a "backdoor", it's documented in the datasheet... http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia... (page 82) ...which along with the already publicly-known microarchitecture of the C3 makes this statement sound like total nonsense: The rosenbridge backdoor is a small, non-x86 core embedded alongside the main x86 core in the CPU I remember laughing at this with a few others knowledgeable i…

Was this documentation public at the time? The pdf still does not document the instructions themselves.

It was public at least 4 years before he first announced his discovery:

https://web.archive.org/web/20140130160743/http://datasheets...

Re: Hardware backdoors in some x86 CPUs

#24

Post by 23455646gg3g »

inigyou wrote: post #21
userbinator wrote: post #15

Earlier quoted context omitted.

It's not even a "backdoor", it's documented in the datasheet... http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia... (page 82) ...which along with the already publicly-known microarchitecture of the C3 makes this statement sound like total nonsense: The rosenbridge backdoor is a small, non-x86 core embedded alongside the main x86 core in the CPU I remember laughing at this with a few others knowledgeable i…

Was this documentation public at the time? The pdf still does not document the instructions themselves.

yes, AIS was known

sandsifter was lots of noisy PR, but no new encoding findings

Re: Hardware backdoors in some x86 CPUs

#26

Post by phire »

userbinator wrote: post #15
joss82 wrote: post #6

This backdoor only appears on decades-old VIA C3 embedded x86 processors

It's not even a "backdoor", it's documented in the datasheet... http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia... (page 82) ...which along with the already publicly-known microarchitecture of the C3 makes this statement sound like total nonsense: The rosenbridge backdoor is a small, non-x86 core embedded alongside the main x86 core in the CPU I remember laughing at this with a few others knowledgeable i…

"It's documented in the datasheet" is such a weak excuse for a backdoor.

Documenting a backdoor doesn't make it not a backdoor, just means it's not a hidden backdoor.

The fact that a number of machines shipped with the backdoor accidentally enabled, and nobody noticed for over a decade shows just how dangerous even a documented backdoor can be. The oversight wasn't even detected by someone reading the manual, it was detected by a security researcher who wrote a generic tool to fuzz out such backdoors.

Re: Hardware backdoors in some x86 CPUs

#28

Post by brador »

phire wrote: post #26
userbinator wrote: post #15

Earlier quoted context omitted.

It's not even a "backdoor", it's documented in the datasheet... http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia... (page 82) ...which along with the already publicly-known microarchitecture of the C3 makes this statement sound like total nonsense: The rosenbridge backdoor is a small, non-x86 core embedded alongside the main x86 core in the CPU I remember laughing at this with a few others knowledgeable i…

"It's documented in the datasheet" is such a weak excuse for a backdoor. Documenting a backdoor doesn't make it not a backdoor, just means it's not a hidden backdoor. The fact that a number of machines shipped with the backdoor accidentally enabled, and nobody noticed for over a decade shows just how dangerous even a documented backdoor can be. The oversight wasn't even detected by someone reading the manual, it was…

Doesn’t backdoor imply hidden? If it’s clearly documented it’s just a (front)door?

Re: Hardware backdoors in some x86 CPUs

#29

Post by codedokode »

po1nt wrote: post #25
bassiee wrote: post #12

For Intel-ME and AMD PSP, you fundamentally can't see the backdoor they could produce unless you probe the seperate chip lol.

Or we use AI to find bug in those systems. Along with the way to completely disable those.

If you have an AI, you could make it analyze crystal photos?

Re: Hardware backdoors in some x86 CPUs

#30

Post by blank429384jf »

brador wrote: post #28
phire wrote: post #26

Earlier quoted context omitted.

"It's documented in the datasheet" is such a weak excuse for a backdoor. Documenting a backdoor doesn't make it not a backdoor, just means it's not a hidden backdoor. The fact that a number of machines shipped with the backdoor accidentally enabled, and nobody noticed for over a decade shows just how dangerous even a documented backdoor can be. The oversight wasn't even detected by someone reading the manual, it was…

Doesn’t backdoor imply hidden? If it’s clearly documented it’s just a (front)door?

backdoor means a secondary access point that defeats the security features of the primary. In the door analogy, the home owner spends a ton on a lock and camera for the front door but doesn't even have a deadbolt on the back.
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