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Assembly Hall of Shame

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Re: Assembly Hall of Shame

#4
There’s definitely strategies here; A lot of the floating point operations use subnormals, and a lot of the worst instructions are slowed down by really, really fucking with MMIO.

Re: Assembly Hall of Shame

#6
It’s crazy how computers still seem to get perceivably slow every few years, given how many instructions can be executed in 1ms. Shameful, even..

What’s that law called about programmers wasting all the compute on abstraction?

Re: Assembly Hall of Shame

#8
post #6

It’s crazy how computers still seem to get perceivably slow every few years, given how many instructions can be executed in 1ms. Shameful, even.. What’s that law called about programmers wasting all the compute on abstraction?

Huh? A millisecond is an eternity!

Re: Assembly Hall of Shame

#9
It'd be really interesting to see whether the winning (losing?) instructions/strategies would be different on other architectures. At least right now the top spot (`fxrstor64` on MMIO, starve PCIe) seems relatively architecture-independent, but maybe something about MMIO ordering rules on e.g. POWER would be different enough to change that -- or perhaps open up new avenues?

I wonder what the actual limit on this `fxrstor64` is right now. If you can stall the PCIe bus for that long, then why not indefinitely? Certainly there's no forward progress guarantee here.

Re: Assembly Hall of Shame

#10
post #6

It’s crazy how computers still seem to get perceivably slow every few years, given how many instructions can be executed in 1ms. Shameful, even.. What’s that law called about programmers wasting all the compute on abstraction?

The new windows notepad is a disgrace
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