21–30 of 89 posts
Rapid Chip Reverse Engineering Using Laser, Focused ion beams, and Scanning electron microscope https://academic.oup.com/mam/article/30/Supplement_1/ozae044...
FIBs are also used to test modifications before doing a respin. I'm still in awe that matter can be manipulated so precisely
At my uni, 15 years ago, one postdoc reverse engineered NVIDIA chip and wrote more performant compiler. He did that by connecting oscyloscops to all chip's outputs and started with applying random current on inputs. Using ML and his genius he rediscoverd all opcodes including a few hidden ones. Eventually he got hired by some company that was doing a lot of GPU on supercomputers.
There is absolutely no way that happened. 15 years ago, we're talking Fermi class GPUs and chips with hundreds of millions of bits of on-chip state and much more if you include the DRAM. You can't tease out the right information by applying random inputs. Which input would you even use? The PCIe interface? You'd first "randomly" need to get past its complex training sequences... Your postdoc probably wrote micro-benc…
So...agreed...far more likely there was a software solution of some kind if this happened.
At my uni, 15 years ago, one postdoc reverse engineered NVIDIA chip and wrote more performant compiler. He did that by connecting oscyloscops to all chip's outputs and started with applying random current on inputs. Using ML and his genius he rediscoverd all opcodes including a few hidden ones. Eventually he got hired by some company that was doing a lot of GPU on supercomputers.
people who can do this stuff are super-smartypants but reminds me how we're going to find out on an industrial level when the Saudis give China some nvidia chips they were grifted they've cloned lots of chips before but nothing that advanced
You can do this. If you commit the whole next month to it you'll make quite some progress. But you won't.
Earlier quoted context omitted.
Now you're making me imagine some kind of 3D-scanning, confocal x-ray fluorescent spectroscope. Or maybe some kind of hybrid of x-ray microtomography and spectroscopic analysis all in one. But, maybe the energies involved would be about the same destructive power as some microtome slicing technique...
We already know that X-rays don't destroy chips.
Earlier quoted context omitted.
We already know that X-rays don't destroy chips.
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https://www.chu.berkeley.edu/modern-semiconductor-devices-fo...
LLMs have already been shown to cause cognitive/skill performance losses in some users. =3
Earlier quoted context omitted.
Now you're making me imagine some kind of 3D-scanning, confocal x-ray fluorescent spectroscope. Or maybe some kind of hybrid of x-ray microtomography and spectroscopic analysis all in one. But, maybe the energies involved would be about the same destructive power as some microtome slicing technique...
We already know that X-rays don't destroy chips.
These things can definitely erode the targets. Tomography experiments have to think carefully to optimize the set exposure angles used during a session, because the target degrades more with each shot.
Is there something like an Extract-SPICE tool that takes a circuit and gives you back a text rendering of it ?
Circuit designers use these tools basically daily for two reasons - the first is Layout Versus Schematic. We want to make sure that the physical layout matches the schematic, so the tool turns the layout GDS into a netlist and compares that to the netlist created from the schematic (basically a diff, but more complicated). The second is so we can run simulations that take into account the "parasitic" resistances and capacitances of the wires and metal shapes in the physical layout. It's basically the same procedure as LVS with an extra step that analyzes the metal shapes to determine said R's and C's.
I wish I had more time and I'd throw Calibre at it.