Earlier quoted context omitted.
I was hoping for some variant of the FORCEDENTRY iPhone Messages exploit, which built an entire CPU with the PDF fax blitting operations.
I tried looking it up but failed to find any technical write ups of how this was done, do you have any links maybe? Super interesting to read.
Video2NAND – Abusing video codecs for great computational power
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Re: Video2NAND – Abusing video codecs for great computational power
#12Sadly doesn't look turing complete (yet) :(
if you can make a nand gate, you can make any other logic gate, thus turing complete
I think you also need some form of intermediate storage to be Turing complete.
Not that this example doesn't have intermediate storage... But I suspect you could create or discover a mechanism that is expressive enough to implement any chain of logic gates, but is incapable of expressing storage (can't even use the gates to implement a latch)
I'm also a little dubious of granting the "Truing complete" label to something that can't conditionally terminate (at minimum)
Maybe you can trick a video codec into looping forever without new key frames (in which case it can never terminate), but most likely this would need to be implemented unrolled, so always terminates after a fixed number of iterations.
Re: Video2NAND – Abusing video codecs for great computational power
#13Funny this is how people initially started re-shaping some computational problems to resemble graphic pipelines and get "great computational power"; back when it was called GP(General Purpose-)GPU computing.
Re: Video2NAND – Abusing video codecs for great computational power
#14Earlier quoted context omitted.
I tried looking it up but failed to find any technical write ups of how this was done, do you have any links maybe? Super interesting to read.
https://projectzero.google/2021/12/a-deep-dive-into-nso-zero...
I wonder how much overhead that incurs (i.e. how much slower the exploit code is in the JBIG "VM" versus native).
Re: Video2NAND – Abusing video codecs for great computational power
#15Earlier quoted context omitted.
if you can make a nand gate, you can make any other logic gate, thus turing complete
I think you also need some form of intermediate storage to be Turing complete. Not that this example doesn't have intermediate storage... But I suspect you could create or discover a mechanism that is expressive enough to implement any chain of logic gates, but is incapable of expressing storage (can't even use the gates to implement a latch) I'm also a little dubious of granting the "Truing complete" label to someth…
It looks like you can only make "wires" that go down or to the right, so there's no way to connect up NANDs to make a latch or flip-flop (which would require wires going back up or to the left).
Re: Video2NAND – Abusing video codecs for great computational power
#16I was wondering whether there's any way to make wires "cross", which would be needed to construct a non-planar circuit. But even if there isn't a way to do this directly, Gemini tells me that it's possible to construct a planar circuit (built out of XORs which are themselves built out of NANDs) that effectively "crosses" two wires!
Re: Video2NAND – Abusing video codecs for great computational power
#17Mapping the abilities of (fixed-function) "stream transformers" to compute is old, much older than "GPU libraries" or render pipelines and all that. I remember the Commodore Amiga used the blitter's combine to decode/encode floppy data, but there are likely other examples predating that. In which sense is VP8 "different" there from another "fixed-function" processor?
Re: Video2NAND – Abusing video codecs for great computational power
#18Earlier quoted context omitted.
I think you also need some form of intermediate storage to be Turing complete. Not that this example doesn't have intermediate storage... But I suspect you could create or discover a mechanism that is expressive enough to implement any chain of logic gates, but is incapable of expressing storage (can't even use the gates to implement a latch) I'm also a little dubious of granting the "Truing complete" label to someth…
It looks like you can only make "wires" that go down or to the right, so there's no way to connect up NANDs to make a latch or flip-flop (which would require wires going back up or to the left).
If you were limited to just a single frame of itra blocks, then yes. This would be an example of logic without storage.
Also quite limiting as wires could never cross.
But I was kinda jumping ahead and assuming VP8 allows you to mix and match intra and inter prediction modes within a single frame (and that inter prediction will feed into intra prediction... that might be a flawed assumption...)
Inter prediction should allow you to copy from any block on the previous frame, effetely creating unlimited length wires in any direction. This also makes the previous frame latched storage, without having to construct a latch from gates.
Re: Video2NAND – Abusing video codecs for great computational power
#19Earlier quoted context omitted.
It looks like you can only make "wires" that go down or to the right, so there's no way to connect up NANDs to make a latch or flip-flop (which would require wires going back up or to the left).
If you were limited to just a single frame of itra blocks, then yes. This would be an example of logic without storage. Also quite limiting as wires could never cross. But I was kinda jumping ahead and assuming VP8 allows you to mix and match intra and inter prediction modes within a single frame (and that inter prediction will feed into intra prediction... that might be a flawed assumption...) Inter prediction shoul…
Exactly! Hopefully going to get around to it next weekend :)
Also, although you can't trivially cross wires, you can create a wire crossing using a few XOR gates [1]
[1] https://cs.stanford.edu/people/eroberts/courses/soco/project...
Re: Video2NAND – Abusing video codecs for great computational power
#20Earlier quoted context omitted.
It looks like you can only make "wires" that go down or to the right, so there's no way to connect up NANDs to make a latch or flip-flop (which would require wires going back up or to the left).
If you were limited to just a single frame of itra blocks, then yes. This would be an example of logic without storage. Also quite limiting as wires could never cross. But I was kinda jumping ahead and assuming VP8 allows you to mix and match intra and inter prediction modes within a single frame (and that inter prediction will feed into intra prediction... that might be a flawed assumption...) Inter prediction shoul…
> Inter prediction should allow you to copy from any block on the previous frame, effetely creating unlimited length wires in any direction.
I think "going inter" just gives you a third "dimension" along which you can still only travel one way -- but you need bidirectional travel (outputs feeding back into inputs) to implement memory. It makes sense to me that bidirectional travel is not possible here, since it would necessitate some kind of "keep processing until convergence" that could (and often would) prevent the decoder from making progress.
> This also makes the previous frame latched storage, without having to construct a latch from gates.
This makes me think we have different ideas of what "latched storage" means. I think the block that you would call a "latch in the previous frame" is functionally no different from a block elsewhere on the current frame? I don't see how it could have the same "address" but store a different value over time, which is what I'd call the defining property of all "storage".