Fairphone 6 wide camera experimental Linux support
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Fairphone 6 wide camera experimental Linux support
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Re: Fairphone 6 wide camera experimental Linux support
#2Re: Fairphone 6 wide camera experimental Linux support
#3Re: Fairphone 6 wide camera experimental Linux support
#4Re: Fairphone 6 wide camera experimental Linux support
#5Re: Fairphone 6 wide camera experimental Linux support
#6have fairphone looked into supporting GrapheneOS? what exactly is missing there other than "it's not Pixel"?
Re: Fairphone 6 wide camera experimental Linux support
#7Re: Fairphone 6 wide camera experimental Linux support
#8Earlier quoted context omitted.
The hardware doesn't support the relevant security features GrapheneOS requires. https://grapheneos.org/faq#future-devices
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Re: Fairphone 6 wide camera experimental Linux support
#9Earlier quoted context omitted.
The hardware doesn't support the relevant security features GrapheneOS requires. https://grapheneos.org/faq#future-devices
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I think the short answer of what they'd need to do in a practical way is to release a phone that uses one of the latest Qualcomm processors (those have the required hardware security features), make sure they have at least 5 years of driver support and commit to keeping the phone up to date, allow for relocking the bootloater (they might already do that). And I think that's basically it, the Graphene project would be able to take things from there.
Realistically given that they tend to source older/weaker processors for reasons related to their goals it's unlikely they would source a processor with the required security features for their next model, but that's just a guess.
Re: Fairphone 6 wide camera experimental Linux support
#10Some parts that stood out to me: > A phone camera is not a single device. On Qualcomm SoCs, the capture path is a chain: > The bus register base moved from 0xa00 to 0x1800, and encapsulating that offset shift accounted for most of the work. > It gated the AHB register bus used by the whole camera complex, including the CCI. Without it, register accesses silently returned zero. > With the wrong numbering, CSIPHY programmed a lane mask with lane 0 missing, and the PHY never locked. > This was the main bug. Frames arrived at the right rate and size, and buf_done fired, but every pixel was zero. [...] The data path delivered frame timing, but not pixel data. > Changing the register value from PLAIN64 (0xa) to 0x0 turned the all-zero frames into real images: the maximum pixel value was 255, the full colour-bar pattern appeared, and the violations stopped.
Sorry if not, but it seems like so much uses AI nowadays.