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ECC and DDR5

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Re: ECC and DDR5

#41

Post by aidenn0 »

adrian_b wrote: post #24
cyanmagenta wrote: post #16

Earlier quoted context omitted.

Right. Everyone agrees that real ECC is more robust, and production servers of course run it. But it seems to me that if most RAM bitflips are in the module itself (rather than in transmission to CPU), then on-die ECC could in theory make the probability of a bitflip in practice so low that for things like home servers it isn’t worth the price premium for real ECC. But without data on this, everyone is just speculati…

No. On-die ECC was added in DDR5 because the error frequency has increased too much. Its only effect was that now DDR5, as seen externally, has a reliability similar to that of the older memory generations. On-die ECChas not brought any serious improvement in reliability. It has just prevented the degradation of the reliability. The errors generated internally are caused mostly by the ionizing radiation from the envi…

Besides electrical noise, there are mechanical issues as well. I've seen systems fail memtest86+ after being moved, and the issue being fixed after reseating the DIMMs. ECC can catch mis-seated DIMMs very quickly.

Re: ECC and DDR5

#42

Post by adrian_b »

zargon wrote: post #33
adrian_b wrote: post #25

Earlier quoted context omitted.

Yes, ECC DIMMs are available only for the memory speeds guaranteed to work by the manufacturers of CPUs, like Intel and AMD, e.g. for up to DDR5-5600 in UDIMMs or DDR5-6400 in RDIMMs. The "gaming" DIMMs are available in much greater speeds, which are "overclocked" speeds, i.e. there exists absolutely no guarantee from Intel or AMD that they work at the advertised speed, even if they frequently do work. However, with…

AMD, Intel, and motherboard manufacturers do qualify the CPUs and motherboards for "overclocked" (above JEDEC) memory speeds. The systems are designed to work at the overclocked transmission speeds. They need to be paired with memory modules that are capable of functioning at those speeds. With ECC presently being a datacenter thing, companies only make it according to JEDEC specs. If ECC were standard for everyone,…

The motherboard manufacturers test their motherboards, to ensure that they typically work with overclocked memory modules.

If you buy a complete gaming computer which includes overclocked memory, then hopefully the vendor has done a burn-in and has tested for some time the computer, as sold.

However, if you buy the CPU yourself, neither Intel nor AMD provides any guarantee that the CPU will work with overclocked memory.

It is upon you to test your assembled computer, but true tests would require a very long time and a climatic chamber, to offer any kind of certainty that the combination CPU-DIMMs works at the desired speed.

If you have ECC memory, you can try to overclock it and at least in this case you will know for sure if the memory works at the higher speed, or not.

Overclocking ECC memory is actually a method frequently used to verify whether the hardware ECC support and also the operating system EDAC driver work OK.

Re: ECC and DDR5

#43

Post by adrian_b »

aidenn0 wrote: post #41
adrian_b wrote: post #24

Earlier quoted context omitted.

No. On-die ECC was added in DDR5 because the error frequency has increased too much. Its only effect was that now DDR5, as seen externally, has a reliability similar to that of the older memory generations. On-die ECChas not brought any serious improvement in reliability. It has just prevented the degradation of the reliability. The errors generated internally are caused mostly by the ionizing radiation from the envi…

Besides electrical noise, there are mechanical issues as well. I've seen systems fail memtest86+ after being moved, and the issue being fixed after reseating the DIMMs. ECC can catch mis-seated DIMMs very quickly.

The mechanical issues also act through increasing the sensitivity to electrical noise.

The imperfect contacts are equivalent to adding series resistors, possibly in parallel with parasitic capacitors, on the link traces, allowing a greater amplitude for the noise pulses.

Re: ECC and DDR5

#44

Post by lightedman »

adrian_b wrote: post #29
lightedman wrote: post #8

"Ideally we would have some government action to force this given the ongoing cost to society in corrupted data" Why is it so often Australia with the "We must force unnecessary things upon people" attitude?

This would be a consumer protection law like any other such law. Forcing the vendors to sell only products that do what they are advertised cannot be considered in any way as "forcing unnecessary things upon people". Any computer without ECC memory is a computer that does not compute from time to time and you have no idea when that happens. Originally, any IBM PC or compatible had memory error detection. All this pro…

"All this problem of the computers without ECC memory has been created by some evil Intel employees, who have conceived around 1994 a scheme for market segmentation between "Pentium" and "Pentium Pro"."

I hate to break it to you but the computer I had in the 80s didn't come with ECC. Non-ECC computing was a thing WELL BEFORE Intel tried to think of market segmentation. Revisionist history is not welcomed here.

Re: ECC and DDR5

#45

Post by adrian_b »

inigyou wrote: post #22
nahuel0x wrote: post #3

Something important not discussed here is that you need not only error correction (when possible) but also error reporting, so you can know you RAM is failing. Sadly, is not possible to get DDR5 on-die ECC error counts reported to the OS. Alternative solution, use IBECC with DDR5, where the CPU reserves a portion of the RAM for parity bits and does the check / reporting.

My Linux installation came with an AMD MCE driver that reports them to dmesg. It logs a few corrected errors a day.

A few errors per day seems much too frequent, unless you live at a high altitude.

Normal good DIMMs, at least when new, should not have errors more frequently than one error per many months.

Frequent errors may appear with memories that are not seated well in their sockets, or which are old, at least several years old.

Frequent errors may also be caused by more general computer problems, like a bad power supply unit.

Re: ECC and DDR5

#46

Post by lightedman »

inigyou wrote: post #23
lightedman wrote: post #8

"Ideally we would have some government action to force this given the ongoing cost to society in corrupted data" Why is it so often Australia with the "We must force unnecessary things upon people" attitude?

How is it unnecessary. Australia has tons of laws about faulty products. All developed countries do

[flagged]

Re: ECC and DDR5

#47

Post by mihular »

exabrial wrote: post #31

> We need ECC RAM to be more widely used. Ideally we would have some government action to force this given the ongoing cost.... The rest of this article is great. This, however, is absolute garbage and nonsense. The last thing you want is more regulations and "government certified systems". Take a look at the bullshit with age verification bills and operating systems.

We need any RAM at this point.

Re: ECC and DDR5

#48

Post by bikelang »

adrian_b wrote: post #45
inigyou wrote: post #22

Earlier quoted context omitted.

My Linux installation came with an AMD MCE driver that reports them to dmesg. It logs a few corrected errors a day.

A few errors per day seems much too frequent, unless you live at a high altitude. Normal good DIMMs, at least when new, should not have errors more frequently than one error per many months. Frequent errors may appear with memories that are not seated well in their sockets, or which are old, at least several years old. Frequent errors may also be caused by more general computer problems, like a bad power supply unit.

Curious to learn more here - why would altitude play a role here? And when you say high altitude - are we talking La Paz, Bolivia (~12k feet) or Denver, CO (~5k feet)?

Re: ECC and DDR5

#49

Post by snvzz »

I run a 9800x3d with 96GB ECC (2x 48GB DDR5-5800).

It was a pain to select a compatible board and source the RAM but glad I did, in June 2024... the RAM prices went up immediately after.

non-ECC should be a kernel taint in Linux. Newer versions of Windows (12?) should also refuse to boot without ECC. It should be mandatory in DDR6. The insanity must end.

Re: ECC and DDR5

#50

Post by dsr_ »

bikelang wrote: post #48
adrian_b wrote: post #45

Earlier quoted context omitted.

A few errors per day seems much too frequent, unless you live at a high altitude. Normal good DIMMs, at least when new, should not have errors more frequently than one error per many months. Frequent errors may appear with memories that are not seated well in their sockets, or which are old, at least several years old. Frequent errors may also be caused by more general computer problems, like a bad power supply unit.

Curious to learn more here - why would altitude play a role here? And when you say high altitude - are we talking La Paz, Bolivia (~12k feet) or Denver, CO (~5k feet)?

The primary source of uncorrelated bit-flips is, effectively, cosmic radiation.

(Correlated bit-flips are likely from a manufacturing error... or, at least in one case, from excessively radioactive ceramic packaging.)

The more atmosphere you have to randomly absorb high-energy photons, the better.

Higher density memory drops fewer electrons in each well, which means a lower-energy photon can change the state.

Corolary: submarine datacenters are much better than orbital datacenters. Cheaper to cool, construct, shield and access.

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