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RISC-V Is Inevitable: State of the Union Keynote Argues

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Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#61

Post by panick21_ »

mort96 wrote: post #35
panick21_ wrote: post #33

Earlier quoted context omitted.

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

I haven't exactly seen an outpouring of consumer demand for CHERI.

I'm not saying end consumer, I mean companies who have to insure safety and reliability. That is also behind adoption of things like Rust and many other trends.

CHERI gives you that and more. But its still very new and radical, and a lot of work needs to happen all over the place to make it practical.

Once you have micro-controllers and software it makes sense in lots of niches, and then it can expand.

For example, Google OpenTitan project. There is no reason not to use Cheri if the open source core supports it.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#62

Post by panick21_ »

crote wrote: post #52
panick21_ wrote: post #33

Earlier quoted context omitted.

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

> And you cant rewritte 50 years of C in Rust You don't have to. Google already showed that the vast majority of memory safety bugs are in newly-written C code. Stop writing new C code (which the industry already seems to be moving towards) and the problem will eventually solve itself - even with plenty of C code still around. Besides, very few (if any) pieces of code have been around for anywhere close to 50 years.…

Can you show me that research?

Also, nothing new in C is just not happening, there is massive amounts of things that will not switch for decades.

Why not just switch to a slightly different compiler and core, and then you make all your old code safe without verifying it. And your new code in whatever language is also safe.

Also it helps with debugging. Also it helps you enforce security constraints on higher level.

CHERI also gives you features you can build more on-top off.

The silicon area and the performance hit are pretty minor, if it 'just' works for most code and most open source code just works, many people will want to use it.

Yes most bugs are new code, but plenty of bugs aren't and with CHERI I can be much more confident in running all that stuff. Specially older code that isn't as well used and tested as say Linux kernel.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#63

Post by sapiogram »

Tostino wrote: post #59
crote wrote: post #53

Earlier quoted context omitted.

That all depends on their current licensing terms, doesn't it? Besides, ARM-to-RISC-V doesn't require a full redesign. Plenty of components are going to stay more-or-less the same, the big change is the instruction decoder. Chip developers have done far more drastic redesigns while staying with the same ISA - just look at the history of x86. I think the bigger question is: does Apple want to go through another binary…

Look into Apple's ARM licensing terms. They are very generous to apple.

ARM could change that in the long term, Apple doesn't own them. It would be a generational fumble by ARM to lose Apple as a customer, though.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#65

Post by ltbarcly3 »

Why can't anyone build a performant RISC-V cpu?

The SpacemiT K3 seems to be the fastest available right now, and it's basically a joke. https://www.phoronix.com/review/spacemit-k3-pico-itx/3

I'm starting to get the feeling that there is something fundamentally broken in the RISC-V specification that fundamentally limits performance.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#66

Post by pjmlp »

crote wrote: post #48
imtringued wrote: post #37

Earlier quoted context omitted.

Microsoft and Apple will probably switch to CHERI RISC-V for their Secure Enclave/TPMs once it has proven itself in the field. That means there will be hundreds of millions of CHERI RISC-V processors in the world. Not to mention the smartcard market which would mean billions of processors around the world.

The Intel Management Engine famously runs MINIX. Tanenbaum has called it "the most widely used computer operating system in the world" - but it hasn't exactly led to mainstream MINIX adoption. Smartcards often run Java Card, which solves the whole memory safety problem the other way around. You don't need CHERI for this kind of limited platforms: want to run memory-safe C today? Just ban all dynamic memory allocation…

More important to remember is that not everything needs to be Web scale to be a success.

We don't need to measure technology adoption by the late stage capitalism of Silicon Valley VCs.

Many technologies do leave an impact in the industry even when adopted in niche domains.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#67

Post by PaulRobinson »

Headline could read: "RISC-V adoption is 'inevitable' according to RISC-V advocate at RISC-V conference to people who are invested in RISC-V who had come to hear about state of RISC-V adoption".

I'm curious where the data is to support the argument.

I am struggling to see the adoption appetite outside of niche applications where licensing costs of existing architectures are a key barrier.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#68

Post by pjmlp »

rwmj wrote: post #36
panick21_ wrote: post #33

Earlier quoted context omitted.

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

However you can do what Airbus do and formally prove your C code and use a formally proven toolchain like compcert to compile it. Or you can take a performance hit and add bounds checking to the C code[1]. Aircraft systems are probably the best chance that CHERI has, and that's pretty niche, small runs and very expensive, and still better solved in software. [1] I literally wrote the paper on this back in 1996: https…

Most people on HN would run screaming away if they had to follow high integrity computing processes on their daily C programming.

If they think programming with Modula-2 and Object Pascal is programming with a straightjacket, good luck with MISRA, Frama-C, DOD and ISO certifications for reliable C code.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#69

Post by llm_nerd »

speed_spread wrote: post #49
thrownawaysz wrote: post #40

If we go by Apple's architecture history we will get a new one, maybe RISC-V, in 2036. m68k (1984) > PPC (1994) - 10 years PPC (1994) > x86 (2006) - 12 years x86 (2006) > ARM64 (2020) - 14 years ARM64 (2020) > ??? (2036) - 16 years

Except that ARM is pretty much theirs, or at least they have complete control over it, which they never did for any previous arch. They also handle chip production directly. Nothing in RISC-V could be worth more than what they can already wring out of ARM without having to migrate.

Apple has an architecture license agreement that extends "past 2040" (their phrasing), and it requires Apple to pay ARM ~$0.30 per device sold.

Apple can do whatever they want with the cores, but they do have to pay for the privilege and do have a future expiry to worry about, though it's far enough off that it certainly isn't pressing.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#70

Post by Tostino »

sapiogram wrote: post #63
Tostino wrote: post #59

Earlier quoted context omitted.

Look into Apple's ARM licensing terms. They are very generous to apple.

ARM could change that in the long term, Apple doesn't own them. It would be a generational fumble by ARM to lose Apple as a customer, though.

The license agreement they signed a few years back goes into the 2040s. Long term, you are right obviously. That is just so long term, so much can happen in that time span it's hard to even guess.
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