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RISC-V Is Inevitable: State of the Union Keynote Argues

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Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#51

My money is still on ARM. They, and their clients who produce the actual processors, have options to fight back if RISC-V ever becomes a serious competitor for, say, smartphones.

Risc-v bexomomg a competitor is bemeficial for ARM's clients as it gives them leverage in price negotiations, which they don't have at the moment.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#52
post #29

Earlier quoted context omitted.

The problems with CHERI are not whether it's technically good or not, it's organizational. It's an academic project that requires everyone to boil the ocean. They tried to get ARM interested and that didn't go anywhere and now they're trying to get RISC-V interested. But they haven't addressed any of the problems of why manufacturers would ever make a complex and completely incompatible chip for a problem that they (…

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

> And you cant rewritte 50 years of C in Rust

You don't have to. Google already showed that the vast majority of memory safety bugs are in newly-written C code. Stop writing new C code (which the industry already seems to be moving towards) and the problem will eventually solve itself - even with plenty of C code still around.

Besides, very few (if any) pieces of code have been around for anywhere close to 50 years. Over time components naturally get refactored or rewritten for all sorts of reasons. And if you're rewriting anyways, why not switch to a more secure language? Don't allow C for rewrites and over the years every C component will eventually be replaced by a non-C one without forcing a big C-to-Rust rewrite.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#53

If we go by Apple's architecture history we will get a new one, maybe RISC-V, in 2036. m68k (1984) > PPC (1994) - 10 years PPC (1994) > x86 (2006) - 12 years x86 (2006) > ARM64 (2020) - 14 years ARM64 (2020) > ??? (2036) - 16 years

Except that ARM is pretty much theirs, or at least they have complete control over it, which they never did for any previous arch. They also handle chip production directly. Nothing in RISC-V could be worth more than what they can already wring out of ARM without having to migrate.

That all depends on their current licensing terms, doesn't it?

Besides, ARM-to-RISC-V doesn't require a full redesign. Plenty of components are going to stay more-or-less the same, the big change is the instruction decoder. Chip developers have done far more drastic redesigns while staying with the same ISA - just look at the history of x86.

I think the bigger question is: does Apple want to go through another binary compatibility break?

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#54
post #15

Earlier quoted context omitted.

The good RISC-V designs are not free though and the free ones are not good. MCUs are not a category of computer to draw lessons from for the broader market.

is what every company that didn't understand disruption said.

iirc Christenson's chief example was IBM not deigning to cannibalize their high-end disk drive business by competing on the new, less capable low-end devices.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#55

I'm working on making SIMD better in Dart. Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all. This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do…

There are various emulators available that support RVV but they aren't going to be especially useful for benchmarking/profiling.

So you can write code that works, but it's probably a few more years still until high performance RISC-V cores are easily available for profiling RVV code and finding the best code.

Progress is steady though - it will happen soon. It's not one of those "year of desktop Linux" things.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#56
post #7

Earlier quoted context omitted.

Krste wasn't even saying anything controversial. It's obvious that manufacturers will use the cheapest (free) least legally entangled option, and that this adoption will happen first amongst those with the tightest margins. And - Clayton's law[1] - it will eventually extend to the rest of the market (albeit over a very long time). https://en.wikipedia.org/wiki/Clayton_Christensen

The good RISC-V designs are not free though and the free ones are not good. MCUs are not a category of computer to draw lessons from for the broader market.

The good ARM designs aren't free either. The big difference is that you'll always be stuck paying Arm (either for whole ARM cores, or a licensing fee for your own design), whereas with RISC-V there can be genuine competition between companies offering performant RISC-V IP.

In the MCU market the compute core is already an off-the-shelf drop-in component. Just look at the RP2350: in addition to its traditional ARM cores they also last-minute dropped in two RISC-V cores because it was so trivial to do - and you can select which set is active via a boot-time firmware flag. I very much doubt we'll see that kind of flexibility with high-end client compute, but with the switch to separate compute chiplets we're not far off already!

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#57
post #30

Earlier quoted context omitted.

Chinese companies are really into RISC-V and China both builds and uses a lot of smartphones, I'm very sure we won't have to wait 20 years for regular users installing apps on RISC-V hardware.

It still requires Android to care about RISC-V, plenty of NDK stuff. https://developer.android.com/ndk/guides/abis Then OSes like HarmonyOS and HarmonyOS NEXT aren't even that relevant outside China. Finally the chips have to deliver in performance, to actually provide good mobile devices.

> Finally the chips have to deliver in performance, to actually provide good mobile devices.

Or the other way around: the low-end market wants to adopt it due to lower licensing fees, so Android is incentivized to support RISC-V or risk losing that market to a competing platform. Especially in markets with a God App like Wechat something in-between feature phone and smartphone won't be a very hard sell. RISC-V adoption can grow upwards from there.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#58

Earlier quoted context omitted.

The good RISC-V designs are not free though and the free ones are not good. MCUs are not a category of computer to draw lessons from for the broader market.

Wait a few years until a RISC-V Fab as a Service emerges and any teenager with an LLM can design and order their own chips ;)

Pipedream

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#59
post #53

Earlier quoted context omitted.

Except that ARM is pretty much theirs, or at least they have complete control over it, which they never did for any previous arch. They also handle chip production directly. Nothing in RISC-V could be worth more than what they can already wring out of ARM without having to migrate.

That all depends on their current licensing terms, doesn't it? Besides, ARM-to-RISC-V doesn't require a full redesign. Plenty of components are going to stay more-or-less the same, the big change is the instruction decoder. Chip developers have done far more drastic redesigns while staying with the same ISA - just look at the history of x86. I think the bigger question is: does Apple want to go through another binary…

Look into Apple's ARM licensing terms. They are very generous to apple.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#60

It was a decent little talk this one. Now that we are seeing RVA23 chips available we are starting to at least see a lot of software packages actively compiled for the platform. They aren't optimized much at all but they do run. I am cautiously optimistic about the future of RISC-V. It is likely to start biting at the heals of ARM in another 5 years or so, and having no licensing fees makes it very attractive in that…

5 years ago there was a req on the Apple job site for engineers familiar with RISC-V. https://riscv.org/blog/apple-exploring-risc-v-hiring-risc-v-...

It would be more surprising if Apple wasn't exploring RISC-V - even if only for use in auxiliary chips.
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