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RISC-V Is Inevitable: State of the Union Keynote Argues

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Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#31

Post by rwmj »

pjmlp wrote: post #26
rwmj wrote: post #12

Earlier quoted context omitted.

There's zero chance CHERI will go anywhere, I wouldn't worry about it.

ARM and Microsoft care about CHERI, that is enough to eventually make it happen, even if only on high integrity computing, like folks that still care about paying for Unisys ClearPath MCP. Or eventually have its ideas come into the evolution of ARM MTE, Pluton, and Silicon, which increasingly becoming adopted, alongside the oldie SPARC ADI. It is the x86 linage that keeps getting it wrong on hardware memory tagging s…

ARM and Microsoft don't "care" enough to do anything beyond a bit of token research. Maybe there will be some extremely niche chips one day, or maybe not because the problem can be solved 90% as well in software on ordinary hardware.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#32

Post by pdpi »

camel-cdr wrote: post #25
pdpi wrote: post #21

Earlier quoted context omitted.

You can buy a RISC-V mainboard for the Framework Laptop, and it's relatively cheap (£170) https://frame.work/gb/en/products/deep-computing-risc-v-main...

No don't buy this one, it doesn't support RVV. Their newer ones do, but those are a lot more expensive.

Good catch, thanks.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#33

Post by panick21_ »

rwmj wrote: post #29
pjmlp wrote: post #23

Earlier quoted context omitted.

CHERI is valuable even for unsafe Rust code.

The problems with CHERI are not whether it's technically good or not, it's organizational. It's an academic project that requires everyone to boil the ocean. They tried to get ARM interested and that didn't go anywhere and now they're trying to get RISC-V interested. But they haven't addressed any of the problems of why manufacturers would ever make a complex and completely incompatible chip for a problem that they (…

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers.

And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#34

Post by JSR_FDED »

ColdStream wrote: post #2

It was a decent little talk this one. Now that we are seeing RVA23 chips available we are starting to at least see a lot of software packages actively compiled for the platform. They aren't optimized much at all but they do run. I am cautiously optimistic about the future of RISC-V. It is likely to start biting at the heals of ARM in another 5 years or so, and having no licensing fees makes it very attractive in that…

I thought Apple has a special deal with ARM as they were an early investor?

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#35

Post by mort96 »

panick21_ wrote: post #33
rwmj wrote: post #29

Earlier quoted context omitted.

The problems with CHERI are not whether it's technically good or not, it's organizational. It's an academic project that requires everyone to boil the ocean. They tried to get ARM interested and that didn't go anywhere and now they're trying to get RISC-V interested. But they haven't addressed any of the problems of why manufacturers would ever make a complex and completely incompatible chip for a problem that they (…

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

I haven't exactly seen an outpouring of consumer demand for CHERI.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#36

Post by rwmj »

panick21_ wrote: post #33
rwmj wrote: post #29

Earlier quoted context omitted.

The problems with CHERI are not whether it's technically good or not, it's organizational. It's an academic project that requires everyone to boil the ocean. They tried to get ARM interested and that didn't go anywhere and now they're trying to get RISC-V interested. But they haven't addressed any of the problems of why manufacturers would ever make a complex and completely incompatible chip for a problem that they (…

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

However you can do what Airbus do and formally prove your C code and use a formally proven toolchain like compcert to compile it. Or you can take a performance hit and add bounds checking to the C code[1]. Aircraft systems are probably the best chance that CHERI has, and that's pretty niche, small runs and very expensive, and still better solved in software.

[1] I literally wrote the paper on this back in 1996: https://www.doc.ic.ac.uk/~phjk/BoundsChecking.html

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#37

Post by imtringued »

rwmj wrote: post #31
pjmlp wrote: post #26

Earlier quoted context omitted.

ARM and Microsoft care about CHERI, that is enough to eventually make it happen, even if only on high integrity computing, like folks that still care about paying for Unisys ClearPath MCP. Or eventually have its ideas come into the evolution of ARM MTE, Pluton, and Silicon, which increasingly becoming adopted, alongside the oldie SPARC ADI. It is the x86 linage that keeps getting it wrong on hardware memory tagging s…

ARM and Microsoft don't "care" enough to do anything beyond a bit of token research. Maybe there will be some extremely niche chips one day, or maybe not because the problem can be solved 90% as well in software on ordinary hardware.

Microsoft and Apple will probably switch to CHERI RISC-V for their Secure Enclave/TPMs once it has proven itself in the field. That means there will be hundreds of millions of CHERI RISC-V processors in the world.

Not to mention the smartcard market which would mean billions of processors around the world.

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#38

Post by fragmede »

panick21_ wrote: post #33
rwmj wrote: post #29

Earlier quoted context omitted.

The problems with CHERI are not whether it's technically good or not, it's organizational. It's an academic project that requires everyone to boil the ocean. They tried to get ARM interested and that didn't go anywhere and now they're trying to get RISC-V interested. But they haven't addressed any of the problems of why manufacturers would ever make a complex and completely incompatible chip for a problem that they (…

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

> And you cant rewritte 50 years of C in Rust.

How many tokens do you think that would cost?

Re: RISC-V Is Inevitable: State of the Union Keynote Argues

#39

Post by sph »

mort96 wrote: post #35
panick21_ wrote: post #33

Earlier quoted context omitted.

The manufactures will do what costumers demand and if they demand safty then cheri will make a lot of sense to many costumers. And you cant rewritte 50 years of C in Rust. And even in Rust you can still run into various issues.

I haven't exactly seen an outpouring of consumer demand for CHERI.

Is there an outpouring of hardware offer for CHERI? I'm a random nobody, but I'm sitting on this design for a message-passing platform that can only truly perform in a world where processes live in a single address space, which requires CHERI hardware to be feasible (or secure) at all.

CHERI would open many doors in operating system design and security, and it's stagnant because it's not a real thing yet, there's no CPU one can buy that supports it in any way outside of research. Without CHERI, we're stuck with security models from the 1970s. Most people are fine with 1970s design, but the OS research world has been itching for something like this for decades.

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