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IBM debuts sub-1 nanometer chip technology

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Re: IBM debuts sub-1 nanometer chip technology

#161
post #84

Keep hearing that IBM makes these incredible chips but don’t see anyone using IBM chips. What do they do with them?

Approximately everyone (at least in the F500) outside of Big Tech uses them. For example, Costco's entire inventory management system runs on IBM i (so, POWER). You can see the classic terminal look around the store. Banks run a TON of z and i. You'll never see them because they're essentially always in data centers, but I guarantee you interact with them even if it's very non-obvious because there's 50 microservices…

And some of those i and z systems have some obscene engineering in them. I cannot find it now but i remember seeing a cross section of their 40 layer PCB simply so they could get more memory/IO performance to the CPU. POWER may have dropped out of the consumer space but it still has a vital place in servers.

Re: IBM debuts sub-1 nanometer chip technology

#162
post #111

Earlier quoted context omitted.

Why not use something absolute, like nand-gates per volume?

I am not a chip designer, doesn't area matter way more than volume? Vertical space is basically free; it's horizontal space that is at a huge premium.

Plus heat dissipation is a limiting factor, which scales with area.

Re: IBM debuts sub-1 nanometer chip technology

#163

For what it's worth, here's my 7000+ word deep dive into the technology. https://morethanmoore.substack.com/p/ibms-announces-07nm-pro...

Hi Dr. Cutress! I loved reading your deep dives on Anand, they're what got me interested in semiconductors. Hope you're well <3

Re: IBM debuts sub-1 nanometer chip technology

#164
post #91

Earlier quoted context omitted.

Density is mass per volume so how are you comparing it to a planar transistor? Your units don't even match.

Not all densities is mass per volume. eg. population density.

Population density isn’t planar, eg, why cities are denser than towns: their centers are more than 2D.

Re: IBM debuts sub-1 nanometer chip technology

#165
post #80

Just to be clear, this doesn't mean that anything on the die actually measures 0.7nm — it means that it's roughly double the density as the previous node generation. At some point the industry decided to keep talking about "nanometers" even though the actual transistor sizes have been decoupled from the node name for years.

Generations.

Gen Alpha were born since the naming became detached from actual physical size. And parts of Gen Z (before) and Gen Beta (after).

Re: IBM debuts sub-1 nanometer chip technology

#167
post #80

Just to be clear, this doesn't mean that anything on the die actually measures 0.7nm — it means that it's roughly double the density as the previous node generation. At some point the industry decided to keep talking about "nanometers" even though the actual transistor sizes have been decoupled from the node name for years.

Generations. Gen Alpha were born since the naming became detached from actual physical size. And parts of Gen Z (before) and Gen Beta (after).

Naming generations is a futile, arbitrary process, whereas the measurement unit for engineering processes should be precise and well defined?

Re: IBM debuts sub-1 nanometer chip technology

#168
post #167

Earlier quoted context omitted.

Generations. Gen Alpha were born since the naming became detached from actual physical size. And parts of Gen Z (before) and Gen Beta (after).

Naming generations is a futile, arbitrary process, whereas the measurement unit for engineering processes should be precise and well defined?

I was saying not just “years”, but generations (approx two, straddling a full one) have passed since the naming reflected anything real.

In hindsight, I phrased that poorly.

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