One of the images has "15 rows of Si atoms". Is there a limit to how small things can go? A single atom? Is there a physical/molecular limit to Moore's Law?
IBM debuts sub-1 nanometer chip technology
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Re: IBM debuts sub-1 nanometer chip technology
#52One of the images has "15 rows of Si atoms". Is there a limit to how small things can go? A single atom? Is there a physical/molecular limit to Moore's Law?
Yes, and we're already there. We've been there for quite a while, in fact.
Once you make the gate of a transistor small/thin enough, quantum effects take over. Electrons will randomly teleport into and through the gate causing the transistor to conduct when it shouldn't. I don't have numbers to hand, but it's on the order of a few atoms wide. There's really nothing that can be done about it either, as far as we know. Electrons just aren't physical objects at this scale, you can't simply exclude them from any given volume of space. The electron wave function will simply just appear wherever it wants (within the electron probability cloud). The only way to stop it is to make your insulating junction thicker than the probability cloud.
Re: IBM debuts sub-1 nanometer chip technology
#53Earlier quoted context omitted.
IBM Z series mainframe Telum CPUs are designed by IBM but manufactured by Samsung. IBM no longer owns any fabs. I assume they have some kind of technology licensing deal. https://www.ibm.com/products/z/telum
> IBM no longer owns any fabs Per IBM: "IBM Research at Albany [...] includes more than 100,000 square feet of semiconductor fabrication space" I guess that is technically a R&D fab not a production one, but they definitely have in house fabrication capability
It's a lab. It's where ASML brings up the prototype machine and gets it working, with IBM talent working out the problems and getting it ready for commercial operation. They won't make chips at scale there: the facility isn't designed for that part. The thing to understand here is that isn't a simple, clean, comprehensible business arrangement. The Albany facility is highly subsidized by the state. IBM has their hooks deep in the operation and occupation of the site. Such facilities are extraordinary with capabilities that talent that are unique and fabulously expensive. That's why ASML is there, and not just doing it in some village in the Netherlands. It's why when Obama, Biden, Trump or whomever tells ASML to whom they will and won't be selling hardware, ASML listens.
Re: IBM debuts sub-1 nanometer chip technology
#54[deleted]
Re: IBM debuts sub-1 nanometer chip technology
#55One of the images has "15 rows of Si atoms". Is there a limit to how small things can go? A single atom? Is there a physical/molecular limit to Moore's Law?
I mean, you can't get smaller than an atom, there is some amount of plausibility of using individual atoms as at least the occasional computing element. Beyond that, engineering a quark-gluon plasma as a processor? I'd watch that Star Trek episode. (we might fantasize about stuff like that but we're roughly monkeys smashing rocks together in a cave vs. building an iPhone sort of gap away from that kind of thing unles…
You could, in principle, use photons and/or electrons. We got pretty damn close in the vacuum tube era, and photonic computing has been a popular research topic for a while.
You also have quantum computing, which I think can/does use subatomic particles? Not sure about that one
Re: IBM debuts sub-1 nanometer chip technology
#56One of the images has "15 rows of Si atoms". Is there a limit to how small things can go? A single atom? Is there a physical/molecular limit to Moore's Law?
https://en.wikipedia.org/wiki/There%27s_Plenty_of_Room_at_th... https://en.wikipedia.org/wiki/Landauer%27s_principle
> https://en.wikipedia.org/wiki/There%27s_Plenty_of_Room_at_th...
Yes, single-atom manipulation has already been demonstrated:
* https://en.wikipedia.org/wiki/IBM_(atoms)
Can you make transistors using that technique? Can you smaller?
Re: IBM debuts sub-1 nanometer chip technology
#57Why doesn't the industry use something like transistor density per cubic cm? This would extend to 3d cases and impossible to fake
Re: IBM debuts sub-1 nanometer chip technology
#58Earlier quoted context omitted.
You had the right idea. Angstroms are not an SI unit. The SI units jump by three orders of magnitude at this scale: picometer, nanometer, micrometer, millimeter. (In the same way that meter jumps three orders of magnitude to kilometer[1], or millions to billions to trillions, etc.) [1] Technically there are intermediate SI units between meter and km but nobody uses them. There are not intermediate SI units between th…
Why above 1mm do we go by tens instead of thousands? We have centimeter (10 mm) then decimeter (100mm) then meter (1000mm). Then we jump to thousand again (kilometer).
Answer that question and you'll get the whole impetus for logarithmic scales.
Re: IBM debuts sub-1 nanometer chip technology
#59> logic technology can extend for the first time below the 1 nm node, advancing the era of angstrom-level scaling, where dimensions approach the size of individual atoms. While transistor nodes now refer to a generation of manufacturing technology versus an exact physical dimension, IBM’s 0.7 nm technology—also referred to as 7 angstroms—demonstrates how continued scaling remains possible. Continuing the well establi…
As it can be seen from the photos, horizontally the features are much bigger than 5 nm.
For silicon, the gate length of a FET has a lower limit somewhere between 10 nm and 15 nm.
The current CMOS manufacturing processes have not reached the limit yet. For making smaller transistors, a transition to other semiconductor materials will be necessary.
The vertical thicknesses of various layers may be of only a few nanometers or even of a fraction of a nanometer, but that does not matter directly for the circuit density.
The supposed node size refers to horizontal dimensions, not to vertical dimensions.
Vertical dimensions of around 1 nanometer or less could be achieved already many decades ago, because they depend on growth speed and on time, not on lithography, like the horizontal dimensions.
The industry should have stopped decades ago to talk about the "size" but they should have characterized a CMOS process by its density, e.g. in logic gates per square mm.
However, an actual concrete number would be disliked by marketing, because they could no longer claim that their "1 nm" process is better than the "2 nm" process of another vendor, if their density is not really better.
Re: IBM debuts sub-1 nanometer chip technology
#60Since a transistor can't be smaller than a single atom, maybe it's time to start optimizing our software again.