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IBM debuts sub-1 nanometer chip technology

newsroom.ibm.com

11–20 of 217 posts

Re: IBM debuts sub-1 nanometer chip technology

#11
> IBM and its partners conduct this work at a leading semiconductor research facility in Albany, New York, which will soon be home to a High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography tool, essential for the future of logic scaling. Developed by ASML, this technology enables ultra‑precise circuit printing, supporting the creation of smaller, more powerful chips.

I'm guessing that this is the technology that is developed by Cymer (ASML subsidiary) in California, correct? Is there competing technology? I know xLight is trying to make some inroads on their own version of this EUV tech. I have not heard about any progress though.

Re: IBM debuts sub-1 nanometer chip technology

#14
post #10

> logic technology can extend for the first time below the 1 nm node, advancing the era of angstrom-level scaling, where dimensions approach the size of individual atoms. While transistor nodes now refer to a generation of manufacturing technology versus an exact physical dimension, IBM’s 0.7 nm technology—also referred to as 7 angstroms—demonstrates how continued scaling remains possible. Continuing the well establi…

On the otherhand, no investor really cares what it's called, they just need to know it's next gen.

Re: IBM debuts sub-1 nanometer chip technology

#15
post #10

> logic technology can extend for the first time below the 1 nm node, advancing the era of angstrom-level scaling, where dimensions approach the size of individual atoms. While transistor nodes now refer to a generation of manufacturing technology versus an exact physical dimension, IBM’s 0.7 nm technology—also referred to as 7 angstroms—demonstrates how continued scaling remains possible. Continuing the well establi…

On the otherhand, no investor really cares what it's called, they just need to know it's next gen.

[deleted]

Re: IBM debuts sub-1 nanometer chip technology

#16
post #7

A little bit of a nitpick, but wouldn't that be a picometer instead of angstrom node? Like, isn't a "pico-" the next magnitude smaller than "nano-", or am i wrong? Otherwise, that chip tech sounds really awesome - at least for the future!

There are 3 orders of magnitude between nano (^-9) and pico (^-12). An Angstrom is ^-10m.

Re: IBM debuts sub-1 nanometer chip technology

#17

For anyone who needs it, a friendly reminder that CPU nm marketing is a complete fabrication and the physical size of transistors has zero relation to the marketing claims. These are not, in fact, physically sub 1 nm, despite the bombastic claims.

So the title should be corrected. The did not debut sub nm chips at all.

Re: IBM debuts sub-1 nanometer chip technology

#18
post #3

IBM regularly announces silicon breakthroughs like this but I'm not aware of those ever becoming products. Is IBM mainly in the business of licensing their technology to big silicon manufacturers with stuff like this? Is it just marketing for their consulting business?

I believe that IBM makes the chips for their Z Series mainframes. I mean, that's low volume production, but they need small feature size.

IBM Z series mainframe Telum CPUs are designed by IBM but manufactured by Samsung. IBM no longer owns any fabs. I assume they have some kind of technology licensing deal.

https://www.ibm.com/products/z/telum

Re: IBM debuts sub-1 nanometer chip technology

#19
post #16
post #7

A little bit of a nitpick, but wouldn't that be a picometer instead of angstrom node? Like, isn't a "pico-" the next magnitude smaller than "nano-", or am i wrong? Otherwise, that chip tech sounds really awesome - at least for the future!

There are 3 orders of magnitude between nano (^-9) and pico (^-12). An Angstrom is ^-10m.

Aaahhh, ok, thanks!

Re: IBM debuts sub-1 nanometer chip technology

#20
post #10

> logic technology can extend for the first time below the 1 nm node, advancing the era of angstrom-level scaling, where dimensions approach the size of individual atoms. While transistor nodes now refer to a generation of manufacturing technology versus an exact physical dimension, IBM’s 0.7 nm technology—also referred to as 7 angstroms—demonstrates how continued scaling remains possible. Continuing the well establi…

My read on it was that they are trying to imply a transistor density (in a 2D plane sense) that is comparable to a 1nm process? But they achieve that through stacking (3D, not 2D) since the features aren't actually anywhere near 1nm?
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