11–20 of 49 posts
Earlier quoted context omitted.
If heat is produced by conductors resistance then shorter paths would lead to less heat produced.
I'm not certain (never did hardware), but I thought the transistor switching cost was one of the bigger sources of energy loss, not internal conductor resistance between transistors?
Earlier quoted context omitted.
If heat is produced by conductors resistance then shorter paths would lead to less heat produced.
I'm not certain (never did hardware), but I thought the transistor switching cost was one of the bigger sources of energy loss, not internal conductor resistance between transistors?
How about heat? Seems these days it's the heat above everything else that's the issue. And more density would only aggravate it.
The big issue today is leakage currents. They typical account for around 30%-50% of total chip thermal budget, and they get increasingly difficult to control with smaller devices and lower voltages. They're also get worse with increased temperature(!).
The stacked devices here aren't the worst for leakage currents, but they're not fantastic either. Look at the 2nd graph in section 5: You'll see that the current never drops to zero over the range of gate-source voltages (for V_DS=0.7V). The minimum point is the best-case leakage current, and you can see it's well above zero! (The units on the vertical axis of the graph are unknown btw: The label reads as "current drain-source, arbitrary units")
How about heat? Seems these days it's the heat above everything else that's the issue. And more density would only aggravate it.
I wonder if the proposed CPU/GPU laser cooling technique that was on here a few days ago would penetrate the Si layers? https://news.ycombinator.com/item?id=48510375
https://semiengineering.com/the-race-to-replace-silicon/
https://www.plantengineering.com/semiconductor-material-that...
How about heat? Seems these days it's the heat above everything else that's the issue. And more density would only aggravate it.
I wonder if the proposed CPU/GPU laser cooling technique that was on here a few days ago would penetrate the Si layers? https://news.ycombinator.com/item?id=48510375
The big barrier remains heat and this 3D stacking (aka CFET) makes heat worse by increasing density. It's possible much of the density gains offered by CFETs will remain unutilized unless other approaches to solve the fundamental heat problem are found, possibly discovering new high-conductivity MDI materials.
How about heat? Seems these days it's the heat above everything else that's the issue. And more density would only aggravate it.
What you loose in heat you gain in speed caused by proximity. Perhaps this will allow for lower voltage and thus less heat.
Earlier quoted context omitted.
If heat is produced by conductors resistance then shorter paths would lead to less heat produced.
I'm not certain (never did hardware), but I thought the transistor switching cost was one of the bigger sources of energy loss, not internal conductor resistance between transistors?
And the main loss with switching transistors is in the intermediate switching states where it has less than its "full" resistance.
Really? someone tell that to my city
FET: https://en.wikipedia.org/wiki/Field-effect_transistor
FET: https://en.wikipedia.org/wiki/Field-effect_transistor