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How I leared what a decoupling capacitor is for, the hard way

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Re: How I leared what a decoupling capacitor is for, the hard way

#21

Post by Lerc »

hilbert42 wrote: post #18

Ah how things have changed. When I was learning electronics we mainly dealt with radio and TV circuits and just about the first lesson one learned was to keep leads short (reduce unwanted inductance) and use decoupling capacitors everywhere. I recall some years later a young graduate engineer coming into my office with a rather involved circuit consisting of 30/40 TTL ICs and complaining that he'd double checked the…

I can see how that happens when people come at things from a conceptual digital side first.

It probably doesn't help when you have a circuit diagram that while topologically correct doesn't show the relative positioning between components. The first time I saw all the decoupling caps rendered in a single chain on the side of the diagram I was mightily confused. It seemed like utter nonsense until I realised where they actually went.

Re: How I leared what a decoupling capacitor is for, the hard way

#22

Post by laydn »

nippoo wrote: post #19

This is probably a good place to debunk the usual wisdom that "decoupling capacitors must be placed very close to the IC pins". If you're using a solid power plane, rather than routing power through traces (and honestly 4/6 layer boards are cheap enough these days) it really doesn't matter where you place decoupling capacitors for most uses - keep the via traces short or ideally in the pad, and you can put all your d…

Great paper!. Anyonw know whether there are any modern tools/software that can simulate this during design?

Re: How I leared what a decoupling capacitor is for, the hard way

#23

Post by dragontamer »

WarmWash wrote: post #16
dragontamer wrote: post #3

Earlier quoted context omitted.

If it's really 20MHz++ noise that's screwing him, you need something faster than a through hole capacitor IMO to deal with it. That being said, I'm not 100% convinced this is a 20MHz++ noise issue.

The capacitor doesn't have a concept of "fast enough", it's a passive component. The signal is what determines what it does when it encounters the capacitor. Non-linearities and capacitor species aside, a good ole x7r 100nF would clean this up. In general you can just liberally dump 100nF caps all over your pcb power traces and quash most problems like this before even knowing they exist. I joke that you make a circu…

Look up parasitic inductance.

Through hole parts cap out at maybe low MHz. Many electrolytic caps frankly cannot effectively decouple signals above 100s of kHz even. Above that value, capacitors become inductors due to lead lengths, parasitic resistance, and other details.

To make capacitors work faster, we make them smaller and smaller. Surface Mount Caps are the only way to reach 20MHz++ decoupling speeds, and you need crazier tricks if you need additional decoupling beyond that frequency.

Re: How I leared what a decoupling capacitor is for, the hard way

#24

Post by elch »

userbinator wrote: post #9

This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz. Unless you have a 50MHz buck converter (which would be very exotic --- the fastest common ones are around 1/10th that), that looks more like something may be inadvertently oscillating and/or you're picking up strong RF noise from possibly something in... https://en.wikipedia.org/wiki/6-meter_ban…

I guess he also believes that 50 MHz or so signals can be measured reliably on a 40 MHz (on paper at least) scope.

Re: How I leared what a decoupling capacitor is for, the hard way

#25

Post by elch »

hadrietta wrote: post #4

Having 1.5V Vpp ripple on a 3.3V supply rail seems more like an issue with the regulator / bulk capacitance than a decoupling capacitor, I would think?

1.5 Vpp ripple measured on a 40 MHz scope - when the waveform is 50 MHz according to him...

Re: How I leared what a decoupling capacitor is for, the hard way

#26

Post by Animats »

userbinator wrote: post #9

This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz. Unless you have a 50MHz buck converter (which would be very exotic --- the fastest common ones are around 1/10th that), that looks more like something may be inadvertently oscillating and/or you're picking up strong RF noise from possibly something in... https://en.wikipedia.org/wiki/6-meter_ban…

It's not oscillating at 50MHz. Look at the waveform, with the big spike in the middle. That's a spike at some lower frequency, wider than the screen, followed by ringing. Need to zoom out the time base some more to see the period of the big spikes. It's no higher than 4 MHZ (the screen is 12 units wide) and possibly much lower. (Assuming that M:20ns on the display means 20ns/grid division. The manual is a bit hazy on that part of the UI.)[1]

The power regulator IC mentioned is normally run at 500KHz. There's a reasonable chance that this is the power regulator spike not being damped out. Easy enough to check with a scope handy.

[1] https://fotronic.asset.akeneo.cloud/pdfs/media/owon_hds242s_...

Re: How I leared what a decoupling capacitor is for, the hard way

#27

Post by madaxe_again »

hilbert42 wrote: post #18

Ah how things have changed. When I was learning electronics we mainly dealt with radio and TV circuits and just about the first lesson one learned was to keep leads short (reduce unwanted inductance) and use decoupling capacitors everywhere. I recall some years later a young graduate engineer coming into my office with a rather involved circuit consisting of 30/40 TTL ICs and complaining that he'd double checked the…

I feel it’s a function of abstraction.

You learned when analogue circuitry was the norm. I learned when digital circuitry was simple enough that you could readily take something apart and understand it.

Now, EE courses often start with cad, simulations, digital electronics, and you end up with people building ziggurats atop an ocean of incomprehension.

It’s exactly the same thing with software.

I don’t scorn people for this, rather I see myself as fortunate for having learned in a time when the more fundamental knowledge was still worth learning - and that’s the rub - for a vast majority, it simply isn’t worth the time or energy to explore the full stack, when there’s so much to learn atop it.

Re: How I leared what a decoupling capacitor is for, the hard way

#28

Post by nielsbot »

JCTheDenthog wrote: post #14
userbinator wrote: post #9

This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz. Unless you have a 50MHz buck converter (which would be very exotic --- the fastest common ones are around 1/10th that), that looks more like something may be inadvertently oscillating and/or you're picking up strong RF noise from possibly something in... https://en.wikipedia.org/wiki/6-meter_ban…

>And "leared" -- the (unintentional?) pun made me click. I assume it's a reference to the "Quality Learing Center" in Minnesota, one of the questionable daycares at the center of the alleged Somali daycare fraud scandal. Ever since some of the expose videos about it came out it's become a meme to say "lear" instead of "learn".

> questionable daycares

If they don't find fraud, is it "questionable"?

Re: How I leared what a decoupling capacitor is for, the hard way

#29

Post by lefra »

laydn wrote: post #22
nippoo wrote: post #19

This is probably a good place to debunk the usual wisdom that "decoupling capacitors must be placed very close to the IC pins". If you're using a solid power plane, rather than routing power through traces (and honestly 4/6 layer boards are cheap enough these days) it really doesn't matter where you place decoupling capacitors for most uses - keep the via traces short or ideally in the pad, and you can put all your d…

Great paper!. Anyonw know whether there are any modern tools/software that can simulate this during design?

For approximative simulation, any SPICE simulator works. You'll need to know your capacitors parasitics and power supply output impedance, find a typical via's impedance, and manually compute traces impedances and board capacitance.

For accurate simulation, the actual board geometry needs to be fed to a simulator that'll compute the actual impedances. Last I checked only Very Expensive Software could do that in a user-friendly way (I had to route a DDR3 bus. I ended up being very cautious so that all traces had the same topology and the same lengths, and cross my fingers. It worked).

If anyone knows of free alternatives for that, I'd be interested to hear about it.

Re: How I leared what a decoupling capacitor is for, the hard way

#30

Post by michaelt »

hilbert42 wrote: post #18

Ah how things have changed. When I was learning electronics we mainly dealt with radio and TV circuits and just about the first lesson one learned was to keep leads short (reduce unwanted inductance) and use decoupling capacitors everywhere. I recall some years later a young graduate engineer coming into my office with a rather involved circuit consisting of 30/40 TTL ICs and complaining that he'd double checked the…

> How such critical knowledge can get lost in university training these days just amazes me.

It will probably have been taught.... but very briefly. Before going go back to analysing circuit schematics, where connections between components don't show resistance or inductance, and the capacitance of two parallel capacitors sums.

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