Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

arstechnica.com

Post reply on HN
Print view View original

31–40 of 179 posts

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#31

Post by trynumber9 »

fc417fc802 wrote: post #26

Given that the dies still have L3 on them does this count as L4 or does the hardware treat it as a single pool of L3? Would be neat to have an additional cache layer of ~1 GB of HBM on the package but I guess there's no way that happens in the consumer space any time soon.

Per compute die it functions as one 96M L3 with uniform latency. It is 4 cycles more latency than the configuration with smaller 32M L3. But there are two compute dies, each with their own L3. And like the 9950X coherency between these two L3 is maintained over global memory interconnect to the third (IO) die.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#32

Post by shric »

chao- wrote: post #4

Crazy to think that my first personal computer's entire storage (was 160MB IIRC?) could fit into the L3 of a single consumer CPU! It's probably not possible architecturally, but it would be amusing to see an entire early 90's OS running entirely in the CPU's cache.

You had ~160,000 times more storage than I did for my first personal computer.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#34

Post by tadfisher »

vlovich123 wrote: post #14
basilikum wrote: post #12

Earlier quoted context omitted.

KolibriOS would fit in there, even with the data in memory. You cannot load it into the cache directly, but when the cache capacity is larger than all the data you read there should be no cache eviction and the OS and all data should end up in the cache more or less entirely. In other words it should be really, really fast, which KolibriOS already is to begin with.

Unless you lay everything out continuously in memory, you’ll still get cache eviction due to associativty and depending on the eviction strategy of the CPU. But certainly DOS or even early Windows 95 could conceivably just run out of the cache

Windows 95 only needed 4MB RAM and 50 MB disk, so that's certainly doable. The trick is to have a hypervisor spread that allocation across cache lines.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#36

Post by teaearlgraycold »

nexle wrote: post #17

Breakdown of the (semi-clickbait) 208MB cache: 16MB L2 (8MB per die?) + 32MB L3 * 2 dies + 64MB L3 Stacked 3D V-cache * 2 For comparison, 9950X3D have a total cache of 144MB.

I wouldn’t be caught dead with less than 200MB of cache in my desktop in 2026.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#37

Post by jofzar »

magicalhippo wrote: post #25

Probably fun for those who already bought DDR5 memory... still kicking myself for not just pulling the trigger on that 128GB dual stick kit I looked at for $600 back in September. Now it's listed at $4k... Meanwhile I hope my AM4 will chug along a few more years.

I really want a x3d because a game I play is heavily single threaded, I have the income and the financial stability but I can't in any good conscious upgrade to am5 with the ram prices. It's insane

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#38

Post by jofzar »

erulabs wrote: post #30

9950X3D2? AMD, who is making you name your products like this? At some point just give up and name the chip a UUID already.

I actually don't mind this one, 9950 is the actual chip, x3d is the cache (where it's larger) and the 2 stands for it being on both chiplets.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#39

Post by EnPissant »

monster_truck wrote: post #29

The extra cache doesn't do a damn thing (maybe +2%) The lower leakage currents at lower voltages allowed them to implement a far more aggressive clock curve from the factory. That's where the higher allcore clock comes from (+30W TDP) I'm not complaining at all, I think this is an excellent way to leverage binning to sell leftover cache. Though if I may complain, Ars used to actually write about such things in their…

It's very workload dependent. It certainly does more than 2% on many workloads.

See https://www.phoronix.com/review/amd-ryzen-9-9950x3d-linux/10

> Here is the side-by-side of the Ryzen 9 9950X vs. 9950X3D for showing the areas where 3D V-Cache really is helpful:

Coincidentally, it looks they filtered to all benchmarks with differences greater than 2%. The biggest speedup is 58.1%, and that's just 3d vcache on half the chip.

Re: AMD's Ryzen 9 9950X3D2 Dual Edition crams 208MB of cache into a single chip

#40

Post by Aurornis »

monster_truck wrote: post #29

The extra cache doesn't do a damn thing (maybe +2%) The lower leakage currents at lower voltages allowed them to implement a far more aggressive clock curve from the factory. That's where the higher allcore clock comes from (+30W TDP) I'm not complaining at all, I think this is an excellent way to leverage binning to sell leftover cache. Though if I may complain, Ars used to actually write about such things in their…

> The extra cache doesn't do a damn thing (maybe +2%)

It depends on the task. For some memory-bound tasks the extra cache is very helpful. For CFD and other simulation workloads the benefits are huge.

For other tasks it doesn't help at all.

If someone wants a simple gaming CPU or general purpose CPU they don't need to spend the money for this. They don't need the 16-core CPU at all. The 9850X3D is a better buy for most users who aren't frequently doing a lot of highly parallel work

Post reply on HN