How Taalas “prints” LLM onto a chip?
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How Taalas “prints” LLM onto a chip?
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Re: How Taalas “prints” LLM onto a chip?
#2The single transistor multiply is intriguing.
Id assume they are layers of FMA operating in the log domain.
But everything tells me that would be too noisy and error prone to work.
On the other hand my mind is completely biased to the digital world.
If they stay in the log domain and use a resistor network for multiplication, and the transistor is just exponentiating for the addition that seems genuinely ingenious.
Mulling it over, actually the noise probably doesn't matter. It'll average to 0.
It's essentially compute and memory baked together.
I don't know much about the area of research so can't tell if it's innovative but it does seem compelling!
Re: How Taalas “prints” LLM onto a chip?
#3Other than the obvious costs (but Taalas seems to be bringing back the structured ASIC era so costs shouldn't be that low [1]), I'm curious why this isn't getting much attention from larger companies. Of course, this wouldn't be useful for training models but as the models further improve, I can totally see this inside fully local + ultrafast + ultra efficient processors.
Re: How Taalas “prints” LLM onto a chip?
#4Edit: reading the below it looks like I'm quite wrong here but I've left the comment... The single transistor multiply is intriguing. Id assume they are layers of FMA operating in the log domain. But everything tells me that would be too noisy and error prone to work. On the other hand my mind is completely biased to the digital world. If they stay in the log domain and use a resistor network for multiplication, and…
However, [1] provides the following description: "Taalas’ density is also helped by an innovation which stores a 4-bit model parameter and does multiplication on a single transistor, Bajic said (he declined to give further details but confirmed that compute is still fully digital)."
[1] https://www.eetimes.com/taalas-specializes-to-extremes-for-e...
Re: How Taalas “prints” LLM onto a chip?
#5Imagine a slot on your computer where you physically pop out and replace the chip with different models, sort of like a Nintendo DS.
Re: How Taalas “prints” LLM onto a chip?
#6> Kinda like a CD-ROM/Game cartridge, or a printed book, it only holds one model and cannot be rewritten. Imagine a slot on your computer where you physically pop out and replace the chip with different models, sort of like a Nintendo DS.
Infact, I was thinking, if robots of future could have such slots, where they can use different models, depending on the task they're given. Like a Hardware MoE.
Re: How Taalas “prints” LLM onto a chip?
#7Edit: reading the below it looks like I'm quite wrong here but I've left the comment... The single transistor multiply is intriguing. Id assume they are layers of FMA operating in the log domain. But everything tells me that would be too noisy and error prone to work. On the other hand my mind is completely biased to the digital world. If they stay in the log domain and use a resistor network for multiplication, and…
The document referenced in the blog does not say anything about the single transistor multiply. However, [1] provides the following description: "Taalas’ density is also helped by an innovation which stores a 4-bit model parameter and does multiplication on a single transistor, Bajic said (he declined to give further details but confirmed that compute is still fully digital)." [1] https://www.eetimes.com/taalas-speci…
Re: How Taalas “prints” LLM onto a chip?
#8> Kinda like a CD-ROM/Game cartridge, or a printed book, it only holds one model and cannot be rewritten. Imagine a slot on your computer where you physically pop out and replace the chip with different models, sort of like a Nintendo DS.
Re: How Taalas “prints” LLM onto a chip?
#9Re: How Taalas “prints” LLM onto a chip?
#10Note that this doesn't answer the question in the title, it merely asks it.
I didn't explore the actual manufacturing process.