I was prepared to see something like a trimmed down / smaller weight model but I was pleasantly suprised.
I was excited to hear about the wafer scale chip being used! I bet nvidia notices this, it's good to see competition in some way.
GPT‑5.3‑Codex‑Spark
221–230 of 415 posts
Re: GPT‑5.3‑Codex‑Spark
#222Re: GPT‑5.3‑Codex‑Spark
#223Earlier quoted context omitted.
Bigger chip = more surface area = higher chance for somewhere in the chip to have a manufacturing defect Yields on silicon are great, but not perfect
Does that mean smaller chips are made from smaller wafers?
They can be made from large wafers. A defect typically breaks whatever chip it's on, so one defect on a large wafer filled with many small chips will still just break one chip of the many on the wafer. If your chips are bigger, one defect still takes out a chip, but now you've lost more of the wafer area because the chip is bigger. So you get a super-linear scaling of loss from defects as the chips get bigger.
With careful design, you can tolerate some defects. A multi-core CPU might have the ability to disable a core that's affected by a defect, and then it can be sold as a different SKU with a lower core count. Cerebras uses an extreme version of this, where the wafer is divided up into about a million cores, and a routing system that can bypass defective cores.
They have a nice article about it here: https://www.cerebras.ai/blog/100x-defect-tolerance-how-cereb...
Re: GPT‑5.3‑Codex‑Spark
#224Earlier quoted context omitted.
It would be so cool if it generated live in the presentation and adjusted live as you spoke, so you’d have to react to whatever popped on screen!
There was a pre-LLM version of this called "battledecks" or "PowerPoint Karaoke"[0] where a presenter is given a deck of slides they've never seen and have to present on it. With a group of good public speakers it can be loads of fun (and really impressive the degree that some people can pull it off!) 0. https://en.wikipedia.org/wiki/PowerPoint_karaoke
That is very cool. Thanks for posting this - I think I’m going to put on a PowerPoint karaoke night. This will rule! :)
Re: GPT‑5.3‑Codex‑Spark
#225Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…
Maybe I'm silly, but why is this relevant to GPT-5.3-Codex-Spark?
Re: GPT‑5.3‑Codex‑Spark
#226Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…
Maybe I'm silly, but why is this relevant to GPT-5.3-Codex-Spark?
[deleted]
Re: GPT‑5.3‑Codex‑Spark
#227Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…
Maybe I'm silly, but why is this relevant to GPT-5.3-Codex-Spark?
It’s the chip they’re apparently running the model on.
> Codex-Spark runs on Cerebras’ Wafer Scale Engine 3 (opens in a new window)—a purpose-built AI accelerator for high-speed inference giving Codex a latency-first serving tier. We partnered with Cerebras to add this low-latency path to the same production serving stack as the rest of our fleet, so it works seamlessly across Codex and sets us up to support future models.
Re: GPT‑5.3‑Codex‑Spark
#228Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…
Maybe I'm silly, but why is this relevant to GPT-5.3-Codex-Spark?
That's what it's running on. It's optimized for very high throughput using Cerebras' hardware which is uniquely capable of running LLMs at very, very high speeds.
Re: GPT‑5.3‑Codex‑Spark
#229Earlier quoted context omitted.
Just wish they weren't so insanely expensive...
The bigger the chip, the worse the yield.
Cerebras has effectively 100% yield on these chips. They have an internal structure made by just repeating the same small modular units over and over again. This means they can just fuse off the broken bits without affecting overall function. It's not like it is with a CPU.
Re: GPT‑5.3‑Codex‑Spark
#230Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…
Wooshka. I hope they've got good heat sinks... and I hope they've plugged into renewable energy feeds...
Fresh water and gas turbines, I'm afraid...