Writing a Hypervisor in 1k Lines
seiya.me
Writing a Hypervisor in 1k Lines
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Re: Writing a Hypervisor in 1k Lines
#2RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
Re: Writing a Hypervisor in 1k Lines
#3Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
Re: Writing a Hypervisor in 1k Lines
#4Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
It's one of those topics, that's so modern and based around ecosystem specifics, that you are better off learning from manufacturer manuals and source code, rather than academic theory books.
Like, uni books won't give you an x86 manual because that wouldn't be neutral, but that's precisely the foundation of virtualization, from both a host and guest perspective.
You can read books on x86, but why not use some official intel manual?
Re: Writing a Hypervisor in 1k Lines
#5RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
I think you mean “…will be done in software…,” right?
Re: Writing a Hypervisor in 1k Lines
#6Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
It's one of those topics, that's so modern and based around ecosystem specifics, that you are better off learning from manufacturer manuals and source code, rather than academic theory books. Like, uni books won't give you an x86 manual because that wouldn't be neutral, but that's precisely the foundation of virtualization, from both a host and guest perspective. You can read books on x86, but why not use some offici…
I find many manuals miss the big picture. Maybe read the VMware, Xen, and KVM papers first.
Re: Writing a Hypervisor in 1k Lines
#7Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
Re: Writing a Hypervisor in 1k Lines
#8Re: Writing a Hypervisor in 1k Lines
#9RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
Could you do page table walks in RVV?
Re: Writing a Hypervisor in 1k Lines
#10RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
Could you do page table walks in RVV?
They're dependent loads, so probably not except for the last level of page tables (and that's just be "prefetching" -- doing 4/8/etc walks in parallel, not 1 walk in less time).