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Thanks for the interesting post! The -11 could do things like: mov (PC)+,R0 where the PC+ addressing mode picked the constant out of the next 16 bits in the instruction scheme. It's just brilliant.
I'm glad you liked it! Yeah, with (PC)+ (27), you didn't need a separate immediate addressing mode where you tried to stuff an operand such as 2 into the leftover bits in the instruction word; you could just put your full-word-sized immediate operands directly in the instruction stream, the way you did with subroutine parameters on the PDP-8. And there was a similar trick for @(PC)+ (37) where you could include the 1…
https://github.com/DigitalMars/Empire-for-PDP-11
but I have little knowledge of how the CPU works internally. One could learn the -11 instruction set in a half hour, but learning the AArch64 is a never-ending quest. 2000 instructions!