Live data from Hacker News

SUS Lang: The SUS Hardware Description Language

sus-lang.org

21–24 of 24 posts

Re: SUS Lang: The SUS Hardware Description Language

#21

Earlier quoted context omitted.

I don't recall anyone being "objectively-sucks" level of unhappy with proprietary C compilers. Moving to gcc was often a regression -- because it was much slower to run and sometimes generated worse code -- for developers used to Turbo C or CodeWarrior-style IDEs.

AFAIK when it comes to using the features of recent CPU architectures, Intel's compilers produce more performant / efficient code than GCC or Clang. A sufficiently smart compiler requires ever more clever compiler writers who are deeply knowledgeable about the many quirks of the numerous architectures.

> Intel's compilers produce more performant / efficient code than GCC or Clang

Intel's compiler are clang forks.

Re: SUS Lang: The SUS Hardware Description Language

#24

Hi everyone! Question for Verilog/VHDL Profis: What are your favorite documenting tools? Is there a way to automatically generate API for a project? I am looking for something like autodoc from sphinx but for Verilog.

what do you mean by "api for a project" in a context of digital hardware design?
Post reply on HN