> Support for modern GPU architectures. One of our next milestones is extending MPK to support next-generation architectures such as NVIDIA Blackwell. A major challenge lies in integrating warp specialization — a key optimization for newer GPUs — with MPK’s megakernel execution model.
Compiling LLMs into a MegaKernel: A path to low-latency inference
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Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#32Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#33Isn’t fusing ops at a fine-grained level also the core benefit of JAX over TensorFlow? How does this work compare to JAX?
MPK takes a different approach where instead of incrementally fusing local operators, it decomposes operators into a task graph and builds a runtime system within a single kernel to execute all tasks specified in the task graph.
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#34if you want to try on 5090, it's not supported yet > Support for modern GPU architectures. One of our next milestones is extending MPK to support next-generation architectures such as NVIDIA Blackwell. A major challenge lies in integrating warp specialization — a key optimization for newer GPUs — with MPK’s megakernel execution model.
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#35Certainly an important discovery for utilizing these models on scaled hardware. This approach could certainly be applied beyond LLMs to other types of neural networks. That would be an interesting space to explore.
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#36Probably should make this into a backend of torch.compile
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#37This is very cool. I enjoyed going through the writeup and GitHub README. I was wondering if these same optimizations can be brought to bear on training as well, rather than only inference. I guess the challenge here is fusing backward computations with gradient communication. I also saw that this currently does not handle dynamic workloads such as MoE. I recently came across this paper that does exactly this: FlashD…
Thanks for reading the post and github README. Supporting training is definitely feasible but the benefit may not be as significant as low-latency inference since training generally involves much larger kernels, making kernel launch overhead less significant. Thanks for sharing the FlashDMoE work. Our next step is to support MoE models. Stay tuned!
I look forward to following mirage development.
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#38Next step - compile straight to verilog so I can buy some LLMs on aliexpress
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#39This project is from CMU. Hazy Research at Stanford talked about the megakernel too: https://hazyresearch.stanford.edu/blog/2025-05-27-no-bubbles Good to see the competition in this area. (Edited): Related paper covering the larger "mirage" project, but this doesn't cover the "megakernel" approach: https://arxiv.org/abs/2405.05751
This is the writer of the blog post. You are right that Stanford's work is a parallel effort. The main difference is that our focus is on compilation: making it easier to generate megakernels automatically.
Re: Compiling LLMs into a MegaKernel: A path to low-latency inference
#40Next step - compile straight to verilog so I can buy some LLMs on aliexpress
More seriously, isn't that pretty much what all those AI hardware startups have already been doing for a while now?