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Show HN: Game Bub – open-source FPGA retro emulation handheld

eli.lipsitz.net

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Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#41

Post by elipsitz »

noxa wrote: post #40

Fantastic project and great writeup! The screen tradeoff with needing triple buffering but getting integer scaling was interesting to hear about - any feeling as to whether it adds human-noticeable latency vs. original hardware?

Great question!

In the absolute worst case (drawing an object at the very top of the screen, and the LCD output for the next frame started right before the current one finished), buffering adds a 2 frame delay (33 milliseconds). Probably noticeable for some people, but this worst case is uncommon.

Average case I would expect ~0.5 to 1 frame delay, so 8 to 16 milliseconds. Probably not really noticeable.

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#42

Post by pipes »

elipsitz wrote: post #32
LeoPanthera wrote: post #31

I have an Analogue Pocket, which works really well, but the fact that it uses an FPGA is essentially meaningless to me. Is there really any significant difference compared to software emulation? I know how they're different, I understand the mechanics of it, I just don't understand why it's not possible to make a software emulation that is as good as FPGA emulation. Or maybe it is possible. I always felt like doing i…

I agree, and wrote a rant about this as part of the post: https://eli.lipsitz.net/posts/introducing-gamebub/#a-brief-r... IMO: the only real advantage is that it allows you to meet the precise timing needed to interface with physical hardware, like cartridges and other consoles (with link cables). I think they're also really fun to write, because you think more like a hardware designer than a software engineer.

Am I correct in thinking that FPGAs have an advantage over software emulators when it comes to latency? In particular the latency from the host operating system before input has even been received by the software emulator? I.e. FPGAs don't have a host OS and will have the same latency as original hardware?

This is very much a genuine question, I just want to know if my intuition about this is right or wrong.

Your project looks amazing btw!

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#43

Post by elipsitz »

pipes wrote: post #42
elipsitz wrote: post #32

Earlier quoted context omitted.

I agree, and wrote a rant about this as part of the post: https://eli.lipsitz.net/posts/introducing-gamebub/#a-brief-r... IMO: the only real advantage is that it allows you to meet the precise timing needed to interface with physical hardware, like cartridges and other consoles (with link cables). I think they're also really fun to write, because you think more like a hardware designer than a software engineer.

Am I correct in thinking that FPGAs have an advantage over software emulators when it comes to latency? In particular the latency from the host operating system before input has even been received by the software emulator? I.e. FPGAs don't have a host OS and will have the same latency as original hardware? This is very much a genuine question, I just want to know if my intuition about this is right or wrong. Your pro…

Yeah, that's another advantage. Theoretically you can get down to I think with a dedicated emulation handheld (non-FPGA), you could probably pull some tricks to bring down the latency though.

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#46

Post by mathgeek »

ThrowawayTestr wrote: post #45

How many retro emulation handheld do we really need? Are there people out there seriously playing retro games for many hours at a time?

Like most things that tempt us with nostalgia and “the cool factor”, many of these likely end up on a shelf or drawer. Still, there are tons of folks buying collector’s editions of new games, etc. The market is there. I personally just own one such handheld and it gets used by the kids once in a while.

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#47

Post by bityard »

Thank you for the nice project and write-up! I love stuff like this!

I visited the comments earlier and was discouraged to find that most of them were of the flavor of, "why does this exist?" From people who have obviously never attempted 1% of an audacious project like this. It exists because it's cool sure looked to be a fun cross-domain learning experience, like what else do you need?

BTW, I have submitted to Hack-A-Day's tip line so don't be surprised in there's an article there about it in a few days.

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#48

Post by Neywiny »

Sadly that display controller MISO thing is notorious. I first ran into it a few years ago. The recommendation was to use a tristate buffer on the chip select line or, as you did, separate the buses.

I also run into the power domain issue a lot. I didn't see a graphic about it in the article but essentially in the majority of devices the IO is like this:

Vdd

|

Esd diode

|

I/O pin

|

Esd diode

|

Ground

Where the diodes are pointing towards. That way if the line goes too negative the lower one will conduct and clamp it to a diode drop + ground, same as if it goes too high to a diode drop + Vdd. The problem is if Vdd has a low impedance path to ground. This is common with power supply ICs either with output discharge resistors or transistors allowing current through to ground. When that happens, your io pin now has a diode in parallel to ground. If you're not careful and don't have current limiting resistors in the way I2C does (because it needs the pull ups), suddenly you're putting the max current your driver can deliver through that diode. Doesn't take much for the smoke to escape.

Some IO pins are designed to be fine without VDD. You can usually check the absolute max ratings for someone like "VDD + 0.3" vs "3.6"

Re: Show HN: Game Bub – open-source FPGA retro emulation handheld

#50

Post by sitkack »

elipsitz wrote: post #29
sitkack wrote: post #21

What is the total cost for a pcb populated with components? Probably around 60-70 qty 100? I appreciate the blog post and the writeup, it might be nice to include it in the repo. I have been toying with a similar design, with many of the same choices. Although for the system controller pair, I'd go with RP2350B and ESP32-C61 (I think). It would be nice if there was an optional chip and pad layout to support legacy or…

Populated PCB in quantity 100 would probably be 60-70 USD, yeah. Maybe a bit less, it really depends on how much you can buy the FPGAs for. I really did want to switch to the RP2350B, but it's (still) not available to buy. There's also the (unreleased) Raspberry Pi RM2 module which would help with Bluetooth Classic and LE support. On Game Bub, I do expose a Pmod interface (4 data wires) connected to the FPGA, so that…

jlcpcb part number C42415655
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