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Using the most unhinged AVX-512 instruction to make fastest phrase search algo

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Re: Using the most unhinged AVX-512 instruction to make fastest phrase search algo

#7

The most unhinged AVX-512 instruction is GF2P8AFFINEQB.

From my 1980s 8-bit CPU perspective, the instruction is unhinged based solely on the number of letters. Compared to LDA, STA, RTS, that's not an assembler mnemonic, it's a novel. :-)

Re: Using the most unhinged AVX-512 instruction to make fastest phrase search algo

#8
post #2

Spoiler if you don’t want to read through the (wonder but many) paragraphs of exposition: the instruction is `vp2intersectq k, zmm, zmm`.

And, as noted in the article, that's an instruction which only works on two desktop CPU architectures (Tiger Lake and Zen 5), including one where it's arguably slower than not using it (Tiger Lake).

Meaning... this entire effort was for something that's faster on only a single kind of CPU (Zen 5).

This article is honestly one of the best I've read in a long time. It's esoteric and the result is 99.5% pointless objectively, but in reality it's incredibly useful and a wonderful guide to low-level x86 optimization end to end. The sections on cache alignment and uiCA + analysis notes are a perfect illustration of "how it's done."

Re: Using the most unhinged AVX-512 instruction to make fastest phrase search algo

#9

Imo the most "unhinged" cpus for AVX-512 are early batches of Alder Lakes which is the only cpu family that has nearly full coverage of all existing avx-512 subsets.

Do they cover anything Sapphire Rapids Xeon's don't? I thought they share the same arch (Golden Cove).
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