Live data from Hacker News

FPGA Architecture for Deep Learning: Survey and Future Directions

arxiv.org

81–90 of 135 posts

Re: FPGA Architecture for Deep Learning: Survey and Future Directions

#82
Reconfigurable logic may be used to implement fairly small models, in applications where they're already employed and adding a coprocessor specifically for ML is either infeasible or doesn't make sense. As the paper mentions, you need hard logic blocks for arithmetic (if not floating point), and these are always in short supply. In DSP applications I've worked on we used the fpga for timing and i/o, to control jitter and sample from many ADCs in parallel - but apart from some filtering then ran the numbers on an adjacent non-reconfigurable core. You can get huge chips with a lot of hard logic built in, but they're relatively expensive compared to fpga + traditional coprocessor with shared memory. The high end application specific chips are shockingly expensive - worse than GPUs because there is comparatively little market for them. We had one evaluation board that was like $100K iirc.

Re: FPGA Architecture for Deep Learning: Survey and Future Directions

#87
post #69
post #68

Dangs got some work cut out for him tonight

I've never seen so much spam in a thread before.

Its across everything on the frontpage. Hundreds of spam links.

It looks very much like a concerted attack of some kind. The spam seems quite ineffective, so I'm wondering if the "real" attack is trying to get the moderators to hell-ban a legitimate person to silence them or something.

I dunno, its really weird. Its hard for me to take this spam at face value, I can't imagine that this website is a good target for such spam. Its clearly just here to annoy the moderators and make them tired vs... something. Reminds me of Starcraft Muta Harass: you're attacking the APM and attention-span of the opponent, not actually trying to straight up win with Muta. If that makes any sense.

Re: FPGA Architecture for Deep Learning: Survey and Future Directions

#89
post #69

Earlier quoted context omitted.

I've never seen so much spam in a thread before.

Its across everything on the frontpage. Hundreds of spam links. It looks very much like a concerted attack of some kind. The spam seems quite ineffective, so I'm wondering if the "real" attack is trying to get the moderators to hell-ban a legitimate person to silence them or something. I dunno, its really weird. Its hard for me to take this spam at face value, I can't imagine that this website is a good target for su…

Or it's some kind of weird-ass SEO campaign (not that it'll work, dang has implemented rel=nofollow a few months ago). Man, I've been on HN for >11 years now, literally never saw a spam campaign this intensive.

Re: FPGA Architecture for Deep Learning: Survey and Future Directions

#90
I'm glad to see this is being studied. I did a brief half-semester project summarizing the usefulness of accelerators after the death of Dennard's law and Moore's law (this was when Intel was still pushing out incremental improvements on 14nm). The short summary is that accelerators offered substantial performance per watt improvement, at the cost of longer development timelines, cost of manufacturing in the case of ASICs and ASIPs, and the inability to fit large algorithms on FPGAs. Though Microsoft found a way to daisy-chain FPGAs for Bing's page rank, it just didn't produce the order-of-magnitude improvement necessary to justify moving to FPGAs. With smaller algorithms or bigger FPGAs or occasional operation offloading (like what we do now with TPUs and GPUs), they could be good candidates for accelerators.

Of course the real killer is how easy it is(n't) to develop for them. AMD offers much better performance per dollar than Nvidia, but of course their poor drivers make using their hardware a fool's errand.

RADs sound like a good idea. We should be making reprogrammable hardware available and easy to use for everyone.

Post reply on HN