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Homemade 6 GHz pulse compression radar

hforsten.com

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Re: Homemade 6 GHz pulse compression radar

#51

Post by henrikf »

_Microft wrote: post #49
henrikf wrote: post #45

Earlier quoted context omitted.

The FPGA manufacturer has characterized all their package pin delays. It's possible to export a csv file with internal delays of the package for each pin from the FPGA design tool. With Xilinx Vivado it's just File -> Export I/O Ports.

Does KiCad allow to take these delays for each pin into account automatically or do you need to do all that manually? Edit: it's using the pad property of "pad-to-die-length" if doing it manually, right?

No, it needs to be done manually. It wasn't as tedious as it sounds though. Most of the pins are very close in delay already and there were just few traces that I had to adjust a little.

Re: Homemade 6 GHz pulse compression radar

#53

Post by Brusco_RF »

amanda99 wrote: post #42

The Finns strike again. Just the depth and number of different areas of expertise is insane to me. It seems he planned it all out, had it printed in China, and then 1/2 of the boards actually worked. That's like building a whole backend+frontend app and hoping it works after a month of coding on startup.

That's pretty typical for hardware development. You software people have it too good!

Re: Homemade 6 GHz pulse compression radar

#55

Post by Brusco_RF »

_Microft wrote: post #43
pythonguython wrote: post #36

Can someone explain why those differential pairs are routed with so many curves instead of straight paths? (E.g. see the photo under the “ADC and DAC rotting” section)

"The traces are length-matched with squiggly lines[...]. The trace matching requirement is ±10 ps according to the Zynq PCB design guide, which is approximately ±2mm in trace length. [...] There is also some delay difference inside the FPGA package which should be considered in the length matching." This is a shortened excerpt from the article. It can be found below the image with six colorful images of PCB layers. I…

One of the main benefits of using an FPGA is that you can compensate for trace length mismatch with timing constraints

Re: Homemade 6 GHz pulse compression radar

#56

Post by bangaladore »

nick__m wrote: post #14

Why the ground planes are on layer 2 and 6 instead of 1 and 6 ? Naively, as someone who doesn't have high frequency PCB design experience, I would have placed my grounds to form a shield and put my voltage plane on layer 3 or 4. I am sure that there is a good reason behind that choice but I don't see it.

It is common to route high-speed signals on the top and bottom layers to avoid vias that cause impedance mismatches even when back drilled ($$$).

To maintain a specific characteristic impedance, you need a plane (GND) some distance from the traces which themselves have a specific width. Without a plane under/above the signals, you can't get a specific impedance value.

You can additionally fill the top and bottom layers, which marginally affects the impedance.

Re: Homemade 6 GHz pulse compression radar

#57

Post by rlt »

throwup238 wrote: post #2

This is great. It’s the last piece I needed for my suburban missile guidance system! This will be the last year the Joneses survive the annual block party. Can you do phased array radars next? I need the extra precision. There’s a few neighbors who don’t clean up after their dogs…

FBI has entered the chat

Re: Homemade 6 GHz pulse compression radar

#58

Post by spxneo »

jcims wrote: post #33

I remember this article from the same site a while back - https://hforsten.com/heartbeat-detection-with-radar.html I bought some cheap 10ghz and 24ghz dopper radar units off of amazon and started tinkering with them. You can absolutely pick up heartbeats and breathing just visually in the spectrogram. Here's a few samples from that era: 10ghz pointed at ceiling fan: https://www.youtube.com/watch?v=tIiFvByf1CQ 10ghz p…

interesting does/can it work behind structures? is it safe to point this at yourself?

Re: Homemade 6 GHz pulse compression radar

#59

Post by CamperBob2 »

topynate wrote: post #41
gertrunde wrote: post #6

Earlier quoted context omitted.

There is this: https://www.crowdsupply.com/krakenrf/krakensdr (Although they had to take the radar elements out of the firmware/software, most likely due to ITAR - ref link: https://forum.krakenrf.com/t/where-has-the-passive-radar-cod... )

A similar ITAR restriction on controlled reception pattern antennas means that GPS jamming is still much more of a problem than it needs to be. Three antenna elements are all you get, according to this: https://www.gpsworld.com/toughen-gps-to-resist-jamming-and-s...

Interesting article. I wonder if any progress on the ITAR issue has been made since 2022? If Brad Parkinson can't steer ITAR in the direction of common sense, nobody can. (For those who don't know, he was the principal architect of the original Navstar GPS system.)

Re: Homemade 6 GHz pulse compression radar

#60

Post by rcxdude »

Brusco_RF wrote: post #55
_Microft wrote: post #43

Earlier quoted context omitted.

"The traces are length-matched with squiggly lines[...]. The trace matching requirement is ±10 ps according to the Zynq PCB design guide, which is approximately ±2mm in trace length. [...] There is also some delay difference inside the FPGA package which should be considered in the length matching." This is a shortened excerpt from the article. It can be found below the image with six colorful images of PCB layers. I…

One of the main benefits of using an FPGA is that you can compensate for trace length mismatch with timing constraints

Not usually with IO ports directly associated with hard IP blocks like the DDR controller in the Zynq though.
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