> Transceivers – Up to 8 GTH transceivers supporting up to 16.3 Gb/s Hey, the Spartan line is useful again!
AMD announces the Spartan UltraScale+ FPGA family
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Re: AMD announces the Spartan UltraScale+ FPGA family
#52Earlier quoted context omitted.
Why? They have a different line for that. Not worth wasting expensive silicone die area for something a lot of customers or projects won't need.
Because a hard core is much smaller and efficient than a soft core. Any small edge application you want to run embedded code on (which I argue is most all) will now need an external hard core or use a lot of precious PL resources and power for a soft core.
Re: AMD announces the Spartan UltraScale+ FPGA family
#53What are some killer apps for FPGAs? What major products do they enable?
Re: AMD announces the Spartan UltraScale+ FPGA family
#54From the article "AMD Spartan UltraScale+ samples and evaluation kits are expected to be available for sampling and evaluation in the first half of 2025." For hardware products, what is the point of making these announcements a year in advance? Are they available for select partners before 2025?
When you need to decide on what FPGA line you are going to base your products on, you certainly want to know years in advance what new models will obsolete your FPGA products. However, you don't just want to know their specifications but also their price.
But the flip side is most of them tell you ahead of time whether something is recommended for new designs, and how long they will guarantee production for.
Which is much more important.
In this day and age with FPGA companies being merged and spun out left and right, i doubt anyone relies on the future line announcements this second.
In more normal times I agree you want to know if you are going down a dead end path.
Re: AMD announces the Spartan UltraScale+ FPGA family
#55> Transceivers – Up to 8 GTH transceivers supporting up to 16.3 Gb/s Hey, the Spartan line is useful again!
What am i missing?
(IE It's still only pcie gen3, and this announcement doesn't change that)
Re: AMD announces the Spartan UltraScale+ FPGA family
#56What are some killer apps for FPGAs? What major products do they enable?
Before you had to have:
A. a PLC that ran logic with real time guarantees to tie everything together. The PLC is often user-modified to add more logic.
B. Decoders that processed several mhz encoder feedback signals, somewhere between 3 and 10 of these.
C. Something that decides what to do with the data in B
D. Encoders and motor driving, also being output at several mhz (somewhere between 3 and 10 of these as well)
Among other tasks.
These were all separate chips/boards/things that you tried to synchronize/manage. Latency could be high. But if you are moving 1200 inches per minute (easy), 100 milliseconds latency is equivalent to losing track of things for 2 inches. Enough to ruin anything being made.
Nowadays it is often just an FPGA hooked up to a host core.
(or at a minimum, a time-synchronized bus like ethercat)
Re: AMD announces the Spartan UltraScale+ FPGA family
#57> Transceivers – Up to 8 GTH transceivers supporting up to 16.3 Gb/s Hey, the Spartan line is useful again!
They already supported this line rate though, for years? What am i missing? (IE It's still only pcie gen3, and this announcement doesn't change that)
Also, it looks like PCIe Gen 4. The bitrate is enough and the page says Gen4x8. Is there something I'm missing?
Re: AMD announces the Spartan UltraScale+ FPGA family
#58What are some killer apps for FPGAs? What major products do they enable?
Re: AMD announces the Spartan UltraScale+ FPGA family
#59What are some killer apps for FPGAs? What major products do they enable?
Re: AMD announces the Spartan UltraScale+ FPGA family
#60> Transceivers – Up to 8 GTH transceivers supporting up to 16.3 Gb/s Hey, the Spartan line is useful again!