From the article "AMD Spartan UltraScale+ samples and evaluation kits are expected to be available for sampling and evaluation in the first half of 2025." For hardware products, what is the point of making these announcements a year in advance? Are they available for select partners before 2025?
AMD announces the Spartan UltraScale+ FPGA family
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Re: AMD announces the Spartan UltraScale+ FPGA family
#42I wonder what is the hardware programming interface. Something "horribly" simple I hope and suppose (memory mapped command ring buffers and dma buffers?) Then quickly getting up and running a shmol RV64 core... and I guess this is hacker paradise.
> I wonder what is the hardware programming interface.
Vivado
> Then quickly getting up and running a shmol RV64 core... and I guess this is hacker paradise.
Re: AMD announces the Spartan UltraScale+ FPGA family
#43No hard core is a bummer. I want to see the first party SOM.
Why? They have a different line for that. Not worth wasting expensive silicone die area for something a lot of customers or projects won't need.
Because a hard core is much smaller and efficient than a soft core. Any small edge application you want to run embedded code on (which I argue is most all) will now need an external hard core or use a lot of precious PL resources and power for a soft core.
Re: AMD announces the Spartan UltraScale+ FPGA family
#44From the article "AMD Spartan UltraScale+ samples and evaluation kits are expected to be available for sampling and evaluation in the first half of 2025." For hardware products, what is the point of making these announcements a year in advance? Are they available for select partners before 2025?
Yes they are.
Re: AMD announces the Spartan UltraScale+ FPGA family
#45> Transceivers – Up to 8 GTH transceivers supporting up to 16.3 Gb/s
Hey, the Spartan line is useful again!
Re: AMD announces the Spartan UltraScale+ FPGA family
#46From the article "AMD Spartan UltraScale+ samples and evaluation kits are expected to be available for sampling and evaluation in the first half of 2025." For hardware products, what is the point of making these announcements a year in advance? Are they available for select partners before 2025?
If you know your product needs these features you can do early prototyping and development on similar or higher end platforms and then switch to this new platform when it becomes available.
Having knowledge of upcoming parts is important in hardware engineering for planning purposes.
Re: AMD announces the Spartan UltraScale+ FPGA family
#47I wonder what is the hardware programming interface. Something "horribly" simple I hope and suppose (memory mapped command ring buffers and dma buffers?) Then quickly getting up and running a shmol RV64 core... and I guess this is hacker paradise.
In FPGAs you are literally programming the enablement of individual logic gates. That's it. There is no DMA or command ring, you have to implement it yourself. The FPGA bit code itself is extremely propertiary to each vendor as the nature of controlling all the logic sauces is all secret sauce. So you have to use the vendors tooling.
If we have to go thru a closed source or brain damaged hardware programming interface, this is a loss for us.
Re: AMD announces the Spartan UltraScale+ FPGA family
#48From the article "AMD Spartan UltraScale+ samples and evaluation kits are expected to be available for sampling and evaluation in the first half of 2025." For hardware products, what is the point of making these announcements a year in advance? Are they available for select partners before 2025?
When you need to decide on what FPGA line you are going to base your products on, you certainly want to know years in advance what new models will obsolete your FPGA products. However, you don't just want to know their specifications but also their price.
Re: AMD announces the Spartan UltraScale+ FPGA family
#49What are some killer apps for FPGAs? What major products do they enable?
It can be of use in anything that handles a lot of data throughput but not built in large enough numbers to justify producing an ASIC. First example that comes to mind is an oscilloscope, but by definition FPGAs can be used anywhere (from retrogame consoles to radars).
Re: AMD announces the Spartan UltraScale+ FPGA family
#50Earlier quoted context omitted.
They enable a bunch of niches (some of which do have a large impact), as opposed to having a few high-volume uses. Basically anything where you really need an ASIC but you don't have the volume to justify an ASIC (and also have the requires large margins for such a product to be viable). Custom RF protocols, the ASIC development process itself, super-low-latency but complex control loops in big motor drives, that kin…
What you're describing is correct for the top-end FPGA products (they're in every 5G base station, and almost every data centre has thousands of them rerouting information), but the low-end ($10 or less) 2k LE FPGAs are in a hell of a lot of products now too. They're fantastic for anything where you need a lot of logic that executes immediately/concurrently (vs sequentially as would with a microcontroller) in a tiny…
> I'm pretty sure there's an FPGA in most consumer devices now,
I can’t think of the last time I saw an FPGA on a mainstream consumer device. MCUs are so fast and have so much IO that it’s rare to need something like an FPGA. I’ve seen a couple tiny CPLDs, but not a full blown FPGA.
I frequently see FPGAs in test and lab gear, though. Crucial for data capture and processing at high speeds.