Calyx: Intermediate Language for Hardware Accelerators
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Re: Calyx: Intermediate Language for Hardware Accelerators
#2Almost every couple of years (and once a decade for something "big") there is a new development in the area mostly driven either by clueless software guys that wandered outisde their turf into hardware territory, or some university chair that sits in the undefined limbo between hardware and software (usually doing something in the realm of CGRAs) that has to justify its existence by offering a PhD to some guy that will create a new RTL IR or another deadborn HLS.
Developing hardware is a solved problem. Has been for decades. And no, writing a sentence in your white paper that says something like "existing HDLs operate on gates and cycles and its not an appropriate level of abstraction for us" is not enough of a justification. If you need a fancy pseudo-DSL to hold your hand to be able to describe simple datapaths and FSMs for you then you wouldnt be able to develop anything hardware related that is remotely useful. You cannot abstract away the essence of this engineering task.
What we actually need is a tighter verification loops and better (and more accessible) verification methodology so that hardware development is less daunting in the first place, not another DSL-to-RTL translator (even if extensible, like in calyx case)
Re: Calyx: Intermediate Language for Hardware Accelerators
#3https://calyxir.org/ shows me a Paper button where a click does nothing but grey it.
Re: Calyx: Intermediate Language for Hardware Accelerators
#4Almost every couple of years (and once a decade for something "big") there is a new development in the area mostly driven either by clueless software guys that wandered outisde their turf into hardware territory, or some university chair that sits in the undefined limbo between hardware and software (usually doing something in the realm of CGRAs) that has to justify its existence by offering a PhD to some guy that wi…
> Developing hardware is a solved problem. Has been for decades.
So we should have just stuck with schematic capture, then? Why were HDLs and logic synthesis developed (by those pesky "clueless" software engineers)? To increase productivity. Current HLS can (especially in certain domains like DSP) increase productivity. Sure, I'll agree that some of the hardware oriented DSLs probably weren't all that necessary if you consider the existence of things like generate statements in VHDL and SystemVerilog. But that doesn't mean that experimentation in increasing abstraction (and thus productivity) shouldn't take place. If yours was the reigning opinion in the software world we'd still all be programming in assembler.
Re: Calyx: Intermediate Language for Hardware Accelerators
#5Almost every couple of years (and once a decade for something "big") there is a new development in the area mostly driven either by clueless software guys that wandered outisde their turf into hardware territory, or some university chair that sits in the undefined limbo between hardware and software (usually doing something in the realm of CGRAs) that has to justify its existence by offering a PhD to some guy that wi…
Check out
2.2 Optimizing Accelerator Designs High-level specifications of accelerators encode a treasure trove of control flow information that is lost when lowering to a registertransfer level (RTL) language.
Re: Calyx: Intermediate Language for Hardware Accelerators
#6Almost every couple of years (and once a decade for something "big") there is a new development in the area mostly driven either by clueless software guys that wandered outisde their turf into hardware territory, or some university chair that sits in the undefined limbo between hardware and software (usually doing something in the realm of CGRAs) that has to justify its existence by offering a PhD to some guy that wi…
Author of Calyx here. I always find these arguments quite reductive but will nonetheless entertain them.
"Developing Hardware is a solved problem"
For which audience specifically? Maybe if you consider giant teams at large corps pouring in millions. Is it a solved problem for hobbyists, students, people who're just curious? Most people who're curious about software can go play with it in 15 mins. For hardware, it's more like months.
"If you need pseudo-DSL ..."
Weirdly gatekeepy. Why should hardware be only used by experts? There's lot you could've said about it being hard to optimize hardware well (which is challenging with HDLs too) but instead choose this argument.
"You cannot abstract away this engineering task" The goal of research is to try to do things differently. We already know how to build hardware using HDLs, with waterfall models and giant teams. We want to figure out if there are better ways to do it.
The VLSI revolution wouldn't have happened if randos on the internet kept complaining about how "we already know how to do full custom design" and "you cannot abstract physics". We did before, and it changed the world. Let's have some optimism.
Re: Calyx: Intermediate Language for Hardware Accelerators
#7https://calyxir.org/ shows me a Paper button where a click does nothing but grey it.
Odd, it works correctly for me: https://rachit.pl/files/pubs/calyx.pdf
What platform/browser has this problem?
Re: Calyx: Intermediate Language for Hardware Accelerators
#8https://calyxir.org/ shows me a Paper button where a click does nothing but grey it.
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Re: Calyx: Intermediate Language for Hardware Accelerators
#9Seems interesting - if I understand, this lets you get Verilog from a frontend you build. Can this be used to implement say a backend for pytorch? How does one link the generated verilog to software that can drive the design (in sim or actual FPGA/ASIC hardware)?
Or is that left to you to build a driver separately for?
Re: Calyx: Intermediate Language for Hardware Accelerators
#10Almost every couple of years (and once a decade for something "big") there is a new development in the area mostly driven either by clueless software guys that wandered outisde their turf into hardware territory, or some university chair that sits in the undefined limbo between hardware and software (usually doing something in the realm of CGRAs) that has to justify its existence by offering a PhD to some guy that wi…
Author of Calyx here. I always find these arguments quite reductive but will nonetheless entertain them. "Developing Hardware is a solved problem" For which audience specifically? Maybe if you consider giant teams at large corps pouring in millions. Is it a solved problem for hobbyists, students, people who're just curious? Most people who're curious about software can go play with it in 15 mins. For hardware, it's m…
Good luck! :)