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Show HN: Atopile – Design circuit boards with code

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Re: Show HN: Atopile – Design circuit boards with code

#131

Post by napowderly »

moffkalast wrote: post #126
michaelt wrote: post #6

Very nice! The state of electronics tooling has long been extremely bad - 99% of people who put a regulator into their schematic will want an appropriate input and output capacitor as the datasheet demands. 99% of people who put a microcontroller will want a crystal and a programming port and a reset pin pull-up. It's only because of closed source tools stuck in the stone age that the state of the art is to copy out…

Yeah, trying to learn KiCad is worse than learning Blender. If JLCPcb made a simple online editor that sourced from available parts and integrated directly with their store they'd be running out of banks to put their money into.

They do have this, its called EasyEDA. In my experience its not as good as kicad and definitely not as good as the 'professional' tools like cadence and altium. Our tool does basically do that though! We have a big library of kicad components that can be used in your designs as well as an import just about any JLC component just using its JLCPN. We love their service, would love to see that model proliferated to other companies also, so hard to beat having parts available and in stock.

Re: Show HN: Atopile – Design circuit boards with code

#133

Post by Timot05 »

jhallenworld wrote: post #125

It should produce a schematic as one of its output products.. maybe use graphviz, see: https://observablehq.com/@nturley/netlistsvg-how-to-draw-a-b... HDL tools all do this.

NetlistSVG is great yeah. We had a play with it. We had a visualizer in the compiler early on in the compiler implemented with JointJS. But it was a pain to maintain and difficult to get value out of.

I'm sure we will have some flavor of a visualizer in the compiler one day. But outputting a "normal" schematic doesn't seem like it's the right approach. We might actually end up with a bunch of different ways to "visualize" your circuit, each one optimized for a specific thing you are trying to achieve.

Re: Show HN: Atopile – Design circuit boards with code

#134

Post by jhallenworld »

Why not use Verilog or SystemVerilog?

    module blinky
      (
      input v3v3,
      input gnd
      );

    wire led;

    wire led_r;

    rp2040 u1
      (
      .vcc (v3v3),
      .gnd (gnd),
      .gpioa15 (led)
      );

    resistor #(.VALUE("220"), .TOLERANCE("5%"), .PART("ERJH2CF1R10X"), .SIZE("1206")) r1
      (
      .a (led),
      .b (led_r)
      );

    led #(.PART("WP7113SURDK14V")) d1
      (
      .anode (v3v3),
      .cathode (led_r)
      );

   endmodule
Use Verilog parameters for all of the part information you might want, like links to digikey part number.. or bury them into modules with different names.

FWIW: Cadance "conceptHDL" is a schematic entry program which generates a Verilog netlist like this as its output (usually for board level simulation including ASICs and FPGAs). But if you're careful, Verilog could used directly as the input- the board-level schematic is pretty simple compared with the chip source code.

I'm sure there is a tool somewhere to convert this into an EDIF netlist for Kicad or whatever. [Icarus can do it: https://steveicarus.github.io/iverilog/targets/tgt-fpga.html ]

Also: this is not limited to digital: there is a variant of Verilog called Verilog-AMS specifically designed for analog simulation.

https://en.wikipedia.org/wiki/Verilog-AMS

In Verilog-AMS, you can define a simulation models of your components:

    module resistor
      (
      inout electrical a,
      inout electrical b
      );

    parameter real R = 1.0;

    analog
        V(a,b)
So not only do you get a component, but you also can simulate the whole thing before fabrication to catch mistakes.

Re: Show HN: Atopile – Design circuit boards with code

#136

Post by voctor »

mawildoer wrote: post #37
voctor wrote: post #35

It reminds me of the Akka Graph DSL[1] [1] https://doc.akka.io/docs/akka/current/stream/stream-graphs.h...

Interesting! Haven't come across it before but those linked `~>` operators do indeed quite familiar. If you're familiar with GraphDSL do you have some elements we should look into?

By reading some code here https://github.com/Timot05/logic-card/blob/main/elec/src/log...

I wonder if with directional arrows, instead of writing "out ~ switch.in; switch.out ~ power.gnd", we could write "out ~> switch ~> power.gnd" instead?

But without distinction between in and out ports it may not be possible to check if connections are valid ones.

Anyway, this project really makes me want to learn electronics! Congrats!

Re: Show HN: Atopile – Design circuit boards with code

#138

Post by wkipling »

moffkalast wrote: post #126
michaelt wrote: post #6

Very nice! The state of electronics tooling has long been extremely bad - 99% of people who put a regulator into their schematic will want an appropriate input and output capacitor as the datasheet demands. 99% of people who put a microcontroller will want a crystal and a programming port and a reset pin pull-up. It's only because of closed source tools stuck in the stone age that the state of the art is to copy out…

Yeah, trying to learn KiCad is worse than learning Blender. If JLCPcb made a simple online editor that sourced from available parts and integrated directly with their store they'd be running out of banks to put their money into.

Kicad is not that difficult to use. Sourcing parts can be though.

Re: Show HN: Atopile – Design circuit boards with code

#139

Post by napowderly »

jhallenworld wrote: post #134

Why not use Verilog or SystemVerilog? module blinky ( input v3v3, input gnd ); wire led; wire led_r; rp2040 u1 ( .vcc (v3v3), .gnd (gnd), .gpioa15 (led) ); resistor #(.VALUE("220"), .TOLERANCE("5%"), .PART("ERJH2CF1R10X"), .SIZE("1206")) r1 ( .a (led), .b (led_r) ); led #(.PART("WP7113SURDK14V")) d1 ( .anode (v3v3), .cathode (led_r) ); endmodule Use Verilog parameters for all of the part information you might want, l…

We had a look at a few options before doing our own. A few thoughts; Building a DSL allows us to keep it really simple to start, we tried using SKIDL ( a very cool python project) and found it was pretty easy to get your self in a weird spot, the language would let users do things like create a component and not hold a reference to it.

Units and tolerances are core to our language, the physical world is 'fuzzy' and having a good way to deal with those we think is pretty important.

We are also trying to make it as readable and friendly as possible, our expectation is our users will likely have some experience with python and perhaps a little C back in school, so making it clear and approachable is front of mind.

Very open to critiques on our choices! We still very much in development.

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