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RISC-V Assembler: Arithmetic

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Re: RISC-V Assembler: Arithmetic

#11
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

> there's no official grammar

Most architectures have something. Sparc had one (I still have the manual), PPC, 68k. I would even say x86 does as well but you can’t force its adoption, what AT&T and GNU wants to do on their own can’t be prevented. AT&T I suppose had the goal of making it all consistent, but I’m not sure if that was an improvement. Though I know of its vocal defendants.

RISC-V might be the exception more than anything, but they have a defacto syntax used throughout the spec.

Analog Devices DSPs and Itanium are examples with the = token.

http://laplace.physics.ubc.ca/vnp4/intel/docs/asm_lan.pdf

https://www.nxp.com/docs/en/reference-manual/M68000PRM.pdf

Re: RISC-V Assembler: Arithmetic

#12
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

If you want fun, there's the x86 assembly syntax where the destination is the first register, and the x86 assembly syntax where the destination is the last register. One is the syntax as is used in official documentation (the Intel and AMD manuals), most reverse engineering tools, etc. The other is the syntax most commonly used in practice because it's what gcc defaults to and actually isn't documented (which gets into a problem when you start running into what gcc figured was the best way to adapt AVX-512 EVEX stuff into assembly).

So there's a lot of times where I'm staring at x86 assembly and going "wait, which version is this? the one that does destination first or destination second?"

Re: RISC-V Assembler: Arithmetic

#13
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

If you want fun, there's the x86 assembly syntax where the destination is the first register, and the x86 assembly syntax where the destination is the last register. One is the syntax as is used in official documentation (the Intel and AMD manuals), most reverse engineering tools, etc. The other is the syntax most commonly used in practice because it's what gcc defaults to and actually isn't documented (which gets in…

> and the x86 assembly syntax where the destination is the last register.

ITYM AT&T :). The idea is that the basic grammar is common across architectures to help compiler backend authors. The historical reason for the ordering is because that’s how it was on the PDP-11, the “mother” assembly. And all AT&T/GNU versions preserve this ordering regardless of the vendor format.

> The other is the syntax most commonly used in practice

It didn’t always used to be this way. In the dark ages before NASM, MASM was a top warez.

And depending on what you’re doing I don’t think Intel syntax is uncommon, gas will even accept it for the most part these days.

> "wait, which version is this? the one that does destination first or destination second?"

There must be some mnemonic to associate sigil vomit with destination last. Shitty sigils come out the ass?

Re: RISC-V Assembler: Arithmetic

#14
post #11
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

> there's no official grammar Most architectures have something. Sparc had one (I still have the manual), PPC, 68k. I would even say x86 does as well but you can’t force its adoption, what AT&T and GNU wants to do on their own can’t be prevented. AT&T I suppose had the goal of making it all consistent, but I’m not sure if that was an improvement. Though I know of its vocal defendants. RISC-V might be the exception mo…

There is an assembly manual: https://github.com/riscv-non-isa/riscv-asm-manual/blob/maste...

Re: RISC-V Assembler: Arithmetic

#15
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

Haystack needle

Re: RISC-V Assembler: Arithmetic

#16
post #11

Earlier quoted context omitted.

> there's no official grammar Most architectures have something. Sparc had one (I still have the manual), PPC, 68k. I would even say x86 does as well but you can’t force its adoption, what AT&T and GNU wants to do on their own can’t be prevented. AT&T I suppose had the goal of making it all consistent, but I’m not sure if that was an improvement. Though I know of its vocal defendants. RISC-V might be the exception mo…

There is an assembly manual: https://github.com/riscv-non-isa/riscv-asm-manual/blob/maste...

That document is grossly unfinished and doesn’t even appear to specify syntax outside pseudo ops and a few other things. In a few places it refers to the output of objdump, which I think is close enough to saying “whatever gcc does”.

Re: RISC-V Assembler: Arithmetic

#17
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

Assembly is meant to be 1:1 with machine code, which makes writing an assembler extremely easy as long as you know the architecture. Machine code doesn’t have things like equal signs, it’s literally just a series of bytes (an opcode and operands)

If you want equal signs, use C

Re: RISC-V Assembler: Arithmetic

#18
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

Assembly is meant to be 1:1 with machine code, which makes writing an assembler extremely easy as long as you know the architecture. Machine code doesn’t have things like equal signs, it’s literally just a series of bytes (an opcode and operands) If you want equal signs, use C

Machine code doesn’t have mnemonics either. What’s your point? There are assembly syntaxes with equal signs (The Itanium though ultimately a failure was not obscure and there are a handful of DSP ISAs that use this syntax). Not my cup of tea but your argument is specious.

> Assembly is meant to be 1:1 with machine code,

And that is nonsense as well. RISC-V is a perfect example as it has plenty of pseudo ops. (Or do you actually think that the literal machine code bytes of an add instruction are 0x41 0x44 0x44? - they’re not)

Equal signs or not, macro assemblers have plenty of ergonomic conveniences layered above machine code.

How does an equal sign break any concordance with assembly and the underlying machine code anyway?

Re: RISC-V Assembler: Arithmetic

#19
post #8

> ProTip: Hexadecimal literals are prefixed with 0x. I love the idea that someone could get to this page and not already know that! Also this nicely highlights my pet peeve with assembly: add rd, rs1, rs2 # rd = rs1 + rs2 It's very difficult to remember which parameter is the destination etc. IMO it would be much nicer if assembly had just a little more syntax for that sort of thing. E.g. rd = add rs1, rs2 t0 = li 5…

Assembly is meant to be 1:1 with machine code, which makes writing an assembler extremely easy as long as you know the architecture. Machine code doesn’t have things like equal signs, it’s literally just a series of bytes (an opcode and operands) If you want equal signs, use C

Nonsense. Machine code doesn't have things like commas, brackets and letters, yet we use those in assembly. There's zero reason why you couldn't do my proposal.

Also assembly mnemonics aren't even 1:1 with instructions. Pseudoinstructions do pretty much anything, and even something like `add` can assemble to two different instructions depending on the arguments.

As for writing an assembler being "extremely easy"... yeah no. There's no formal grammar so you're going to be reverse engineering LLVM and GCC's hilariously messy assemblers. Or more realistically, guessing and building an enormous test suite. Not easy at all.

Re: RISC-V Assembler: Arithmetic

#20
post #18

Earlier quoted context omitted.

Assembly is meant to be 1:1 with machine code, which makes writing an assembler extremely easy as long as you know the architecture. Machine code doesn’t have things like equal signs, it’s literally just a series of bytes (an opcode and operands) If you want equal signs, use C

Machine code doesn’t have mnemonics either. What’s your point? There are assembly syntaxes with equal signs (The Itanium though ultimately a failure was not obscure and there are a handful of DSP ISAs that use this syntax). Not my cup of tea but your argument is specious. > Assembly is meant to be 1:1 with machine code, And that is nonsense as well. RISC-V is a perfect example as it has plenty of pseudo ops. (Or do y…

It isn’t my definition so your entire rant here is just being argumentative and defensive for no reason. Just because some fringe ISAs have equal signs in their assembler doesn’t change anything either. Assembly is meant to map directly to the way the machine code is written, and ran, so having [opcode] [operand(s)] makes perfect sense and quality of life/syntactic sugar beyond very simple things like variables (which don’t add some crazy ast or other abstractions that make it a compiler) do not make sense for the tool an assembler is.
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