I've been following home-made semiconductors since Jeri Ellsworth made her own NMOS FETs in 2010.[1] When Sam managed to make his own ICs, I was happy for him, and for the hobby. Now he seems to be on the verge of democratizing access to semiconductor production in very low volumes. I've got my own project to try out once I can get my hands on it.[2] Who knows, petaflop chips made in the garage could be right around…
If I read correctly, that concept maps really well to LUTs as used in FPGAs (but note it's not the same!).
Its author/inventor Mike Warot has the simple but useful idea of making the configuration space of such a device a simple memory array (like RAM or EEPROM cells). Write some bits to a memory location -> cell [x,y] in the device's grid is configured.
This would make it trivial to control/interface such a 'compute grid' to traditional cpus. To a cpu it would just look like regular RAM.
Anyone know if there's work towards applying that idea to FPGAs? It would basically evaporate the problem of [closed source FPGA vendor toolchains].
Obviously, bitstreams produced by FPGA vendor tools will do a somewhat similar thing. But what/how exactly is opaque. Not to mention encrypted bitstreams, read-protection & what have you. Hence require re-engineering effort for open source tool support.
Turning this into a dead simple 1:1 mapping would be a huge step forward.