Most of the chips I interact with on a daily basis are 45 nm, some are 28 nm. Currently working automotive, same in aerospace. A lot of this is because embedded flash generally trails several years behind general availability of a node; so if you're designing a µC or similar with embedded flash, you're starting a few years behind; and then you're guaranteeing a 10 or 15 year supply chain, so on average a production part is on a ~10 year old node (but development activities are biased towards the front of this, since you often need 7 years of remaining supply chain guarantees after start of production). Another factor is that it simply takes time to validate nodes. Automotive nodes trail general use nodes; SEU data takes a few years to gather. Even for non-embedded-flash parts, this can cause a similar delay.
As an example, the TI Hercules is an old but by no means obsolete safety processor. It's one of the best ways to get single-core lockstep capabilities for new designs today. The original TMS570LS parts are still built on a 130 nm process, but the "newer" (not new, but also newest) TMS570LC parts are on 65 nm.
These days most of my work hours are focused on the Aurix TC3xx, which is a 40 nm (tweaked 45 nm) part. This is a multi-core safety processor with an obviously higher transistor count than the Hercules (which is why it was selected for application), matching its smaller process.
Similarly in FPGA land, the Lattice MachXO is on an 130 nm process, while the newer MachXO2 migrated to 65 nm. I know Lattice does newer parts on 28 nm (and I'm sure there's 45 nm out there), but I haven't run into them.
Certainly for more density-heavy applications newer processes (28 nm, often) have come to the forefront, and we're at the point that we're seeing cost cuts going from 90 nm to 28 nm for equivalent functionality. But a lot of these designs are pin-out limited (the silicon area is dominated by getting signals on and off chip, not by the total area of transistors), so cost very much doesn't scale with transistor density; the cost per transistor has gone down, but the cost per unit area has gone up.