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Qualcomm starts a RISC-V joint venture

arstechnica.com

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Re: Qualcomm starts a RISC-V joint venture

#71
post #63

This feels like a shot across the bow in Qualcomm's fight against ARM wrt their core designs bought with Nuvia and whether Qualcomm's ARM architectural license applies to those designs. https://www.engadget.com/arm-qualcomm-lawsuit-trademark-infr...

It’s just good business to hedge your bets across all possible futures.

[dead]

Re: Qualcomm starts a RISC-V joint venture

#72
post #7

Earlier quoted context omitted.

x86 is locked down by Intel and AMD, and ARM demands tribute-- I mean license fees for ARM. That leaves only RISC-V for those who want to make their own processors without paying someone for the privilege. That's the value add.

> " That leaves only RISC-V for those who want to make their own processors without paying someone for the privilege. " OpenSPARC? OpenPOWER? There are plenty of solid open ISAs for anyone who wants to do that.

SPARC only has a 32bit version that's open. Its really not a option. Even if want to use something 32bit, you would like some upgrade path for the future. And technically its also just worse in pretty much every way. After the standardisation there was very little continued progress and investment.

OpenPOWER only became open many, many years after RISC-V was open. OpenPOWER was basically just a marketing name, it was not actually open. Once RISC-V was opened for real, eventually the pressure was on OpenPOWER to actually be opened.

However by the time they opened it up RISC-V already had all the momentum both commercially and in terms of open development.

Re: Qualcomm starts a RISC-V joint venture

#73

Earlier quoted context omitted.

> " That leaves only RISC-V for those who want to make their own processors without paying someone for the privilege. " OpenSPARC? OpenPOWER? There are plenty of solid open ISAs for anyone who wants to do that.

OpenSPARC/POWER is the reason why I am not too excited about RiscV. We have had open GPL designs for close to 20 years and they just sort of went nowhere. RiscV seems to be something neat for those that design processors or work with them low level but for the general person I do not think it will result in anything amazingly different.

SPARC was only open for 32 bit and POWER was not actually open until many years after RISC-V.

> RiscV seems to be something neat for those that design processors or work with them low level but for the general person I do not think it will result in anything amazingly different.

For the general person of course nothing technical matters. But for the industry it matters a whole lot.

Re: Qualcomm starts a RISC-V joint venture

#75

Earlier quoted context omitted.

> " That leaves only RISC-V for those who want to make their own processors without paying someone for the privilege. " OpenSPARC? OpenPOWER? There are plenty of solid open ISAs for anyone who wants to do that.

SPARC only has a 32bit version that's open. Its really not a option. Even if want to use something 32bit, you would like some upgrade path for the future. And technically its also just worse in pretty much every way. After the standardisation there was very little continued progress and investment. OpenPOWER only became open many, many years after RISC-V was open. OpenPOWER was basically just a marketing name, it was…

OpenSPARC seems to have had open 64-bit designs released before RISC-V was launched?

"In March 2006, the complete design of Sun Microsystems' UltraSPARC T1 microprocessor was released-in open-source form, it was named OpenSPARC T1. In early 2008, its successor, OpenSPARC T2, was also released in open-source form. These were the first (and still only) 64-bit microprocessors ever open-sourced. " -https://www.oracle.com/servers/technologies/opensparc.html

Re: Qualcomm starts a RISC-V joint venture

#76
post #40
post #12

Earlier quoted context omitted.

Uefi is pretty pointless when your device doesn't even run a full-blown operating system. In the embedded world your software knows exactly what hardware it is going to run on, so uefi is just a waste of time. You only need something like uefi when you start using mostly hardware-independent software, like trying to run Linux on it. A lot of the chips these companies make are not even remotely close to that.

Many of these devices will run Linux though, and it's becomming increasingly more common as even the low end chips are pretty capable nowadays. It could be worthwhile to build some lightweight alternative to UEFI that just handles disk identification and handing off a devtree to whatever bootloader comes after it instead of implementing the behemoth of a spec that is all of UEFI. Call it "LWFI", "light-weight firmwar…

Not really, no. Linux isn't going to run on a chip with 48k of memory which doesn't even have an MMU, and doing disk identification is pretty pointless when your "disk" is 256k on on-chip flash - or a hardsoldered 2M SPI chip if you are really lucky.

Re: Qualcomm starts a RISC-V joint venture

#77

Earlier quoted context omitted.

SPARC only has a 32bit version that's open. Its really not a option. Even if want to use something 32bit, you would like some upgrade path for the future. And technically its also just worse in pretty much every way. After the standardisation there was very little continued progress and investment. OpenPOWER only became open many, many years after RISC-V was open. OpenPOWER was basically just a marketing name, it was…

OpenSPARC seems to have had open 64-bit designs released before RISC-V was launched? " In March 2006, the complete design of Sun Microsystems' UltraSPARC T1 microprocessor was released-in open-source form, it was named OpenSPARC T1. In early 2008, its successor, OpenSPARC T2, was also released in open-source form. These were the first (and still only) 64-bit microprocessors ever open-sourced. " - https://www.oracle.c…

The 32bit is a standard 'IEEE Standard 1754-1994'. The 64 bit implementation was released by SPARC International but its not a standard.

As far as I know without joining SPARC International you are not allowed to commercially use SPARC 64bit commercially.

There might be open implementations, but that doesn't mean you can be sued for using the architecture.

Re: Qualcomm starts a RISC-V joint venture

#78
post #11
post #10

Earlier quoted context omitted.

I bet that is just a matter of multinationals not wanting to bother with tiny startups. Unless you are ordering hundreds of thousands of chips, they are not even going to respond to your emails. You just aren't worth their time, so they except you to stick to public documentation, buy their dev kit, and figure out out on your own. Want to use a part without public documentation? Tough luck!

I have no idea if it's a lot or not, but for reference, Comma's initial (trial) order was for 10k chips.

That's pretty much an overgrown hobbyist project to them.

Chips are usually sold in reels of 1k or 3k. For quantities like 10k chip vendors will just redirect you to a distributor like Mouser or Digikey - who will be able to ship an order of 150k to you next-business-day without any issues.

The problems start when the chips you want aren't redistributed. You're a rounding error to the manufacturer. Why spend the time and effort assisting a startup with a one-off 10k order when the next email is from a large car manufacturer placing a guaranteed 15M order?

Re: Qualcomm starts a RISC-V joint venture

#79

Earlier quoted context omitted.

I read this as “If you’re reading this ARM, stop raising prices or we’ll replace you”

Until same folks are confronted with the costs to validate their own custom chips and realize this is where the real cost is. It’s not on creating an ISA, as there are already many that are free. If you’re in this market long enough, you know that apart from the current hype, RISC-V is not special.

> Until same folks are confronted with the costs to validate their own custom chips

Except that there are many suppliers who have verified chips that they are happy to sell you. And for some categories of chips, even open ones that are verified.

> It’s not on creating an ISA, as there are already many that are free.

There are not actually many that are free. And non that a are free and practical with lots of suppliers.

> If you’re in this market long enough, you know that apart from the current hype, RISC-V is not special.

Ah that is why RISC-V has a insane growth rate and it getting increasing adoption in lots of different market. Maybe somebody should have told all those people that its not actually special.

Re: Qualcomm starts a RISC-V joint venture

#80

Earlier quoted context omitted.

> Environment is rather toxic. The salary does not compensate that. Same with NXP. Salaries and bonuses are very good(by European standards, ignore FAANG wages) but the overtime, work pressure and workplace toxicity makes that a difficult proposition if you can't stomach the ascension to the level where the REAL money starts to come in. There are indeed people at these big semi companies who can slack off and collect…

Any insider knowledge of other chip companies culture for a someone laid off SNPS, please?

I found Samsung very good. My direct experience was as an English-speaking foreigner doing compilers and JITs etc in their Moscow R&D office mid 2014-early 2018, and visiting colleagues working on the same project in San Jose. You had to be around the office 45 hours a week (first entry to last exit each day, so that includes breaks), but they were serious about people taking weekends off, and their legally-entitled vacation (28 days, plus about 10 statutory holidays, plus about 8 days from New Year to Orthodox Christmas). If your manager asked you to work in the weekend then you got double or triple time.

Unfortunately the location is undesirable at the moment.

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