I wonder how many transistor shrink steps we once EUV High-NA tools are in production. Namely, before it becomes insane and too much unreliable to be reasonable.
Every generation of shrink has pushed a company or two out of the fab business. I would guess that around 10-12 angstroms TSMC, Samsung, or Intel will cease being competitive at the leading edge and fold. Most likely that will happen one more time before the shrinking is no longer physically possible while maintaining chip function.
Then some dies (or chiplet) will probably grow and consume more electricity: I am thinking GPUs... if they can be fed enough data fast enough though. Look at apple Mx dies.
That said, I have still no idea of the geometry of a transistor on a die to get an idea of how far we are (and I am not even talking about ion dopping not working properly anymore).