AMD CEO: The Next Challenge Is Energy Efficiency • Hacker News Board

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#231

Post by cameron_b » Wed, Feb 22, 2023, 2:11 PM UTC

mort96 wrote: post #155

ksec wrote: post #125

Earlier quoted context omitted.

China has licenses for x86-64 “designs” and ARM’s design. Not the ISA. Although “ARM China” is probably enough for them.

Really? No Chinese company has the ARM architecture license? That's honestly a bit surprising if true

ARM China is a wildly different animal than ARM. They went rogue a few years back and though SoftBank/ARM did a lot to get things back in line, it still shows up like this:

https://www.reuters.com/technology/arm-china-says-its-ousted...

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#232

Post by JustSomeNobody » Wed, Feb 22, 2023, 2:14 PM UTC

Kon-Peki wrote: post #2

Energy efficiency and improved packaging are things I can readily agree with. The last thing though - “hybrid algorithms leveraging AI efficiency” sounds an awful lot like a buzzword sales pitch. This article reminds of this other one [1] posted about 1 month ago. It’s an interview with some guys that just got done building an exascale supercomputer, in which it was originally estimated to need 1000 megawatts but ult…

> The last thing though - “hybrid algorithms leveraging AI efficiency” sounds an awful lot like a buzzword sales pitch.

It's supposed to. Investors want to hear this, not some crap about efficiency, when the entire world is talking about AI.

Edit: TBC, I care about efficiency and it's not crap, but that's likely the view of investors.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#233

Post by Xixi » Wed, Feb 22, 2023, 2:14 PM UTC

BlueTankEngine wrote: post #66

Xixi wrote: post #50

Earlier quoted context omitted.

If RISC-V support by Microsoft is as bad as it has been for ARM, then I'm afraid RISC-V will never touch the desktop market, at all. Contrary to ARM, which is being pushed there with great success by Apple. Server-wise of course it's a different story...

If great success to you is that they put the M1 and M2 in a tower, I don't know what to tell you. Intel, AMD, and the x86 industrial complex don't care in the slightest what instruction set your Mac runs

I’m not sure I expressed my point clearly. It wasn’t quite about Apple. So I will reformulate it here: the fate of any instruction set on the desktop is primarily decided by Microsoft.

Do you have any information that Microsoft is planning to support RISC-V at least as well as x86/x64? (That is to say, not with something like Windows RT, or Windows CE)

That would be tremendously good news, I shall add.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#234

Post by [deleted] » Wed, Feb 22, 2023, 2:19 PM UTC

kungito wrote: post #227

makomk wrote: post #177

Earlier quoted context omitted.

One big reason that demand is low is that the current generation of GPUs are way too expensive, with top-end GPUs about twice what they used to cost a few years ago, very poor improvements in performance-per-$, and anythign below the top end offering even more dubious value for money especially on the AMD side. Originally those high prices were a result of high demand compared to supply, but the companies seem to hav…

One big reson why the demand is low is because 1080ti or rx580 can still service 95% of gaming needs so what's the point of upgrading?

[deleted]

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#235

Post by plq » Wed, Feb 22, 2023, 2:20 PM UTC

madmax96 wrote: post #225

This is not a completely hashed-out thought. But I'll share it and see what others think. My impression is that the simplest way to improve energy efficiency is to simplify hardware. Silicon is spent isolating software, etc. Time is spent copying data from kernel space to user space. Shift the burden of correctness to compilers, and use proof-carrying code to convince OSes a binary is safe. Let hardware continue mana…

This sounds like an exokernel design. What forces you to use the compiler that generates the trusted code to replace the MMU?

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#236

Post by mastax » Wed, Feb 22, 2023, 2:20 PM UTC

washadjeffmad wrote: post #215

borissk wrote: post #167

Earlier quoted context omitted.

There's very little difference in the number of PCIe and M2 slots between Intel and AMD on their consumer platforms. The only difference really between AM5 and LGA 1700 motherboards is a lot more AMD boards have one M2 PCIe 5.0 slot, while only the very top Intel boards have this feature.

> very top Intel boards Where "top" means "most expensive". The Z790 board I recently purchased for around $300 was pretty barebones and lackluster (no TB, meager IO from ports and headers, wattage constrained VRM relative to 13th gen TDP, etc), but it was the least costly way to work with an Intel proprietary technology. It'll last another four or five years, but it was my first Intel build since the slocket days, a…

AM5 boards aren't any cheaper than that. I'd say that Intel boards are generally cheaper in fact, though that has narrowed with Z790.

You do get to use the AMD boards for more than two CPU generations though.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#237

Post by bjourne » Wed, Feb 22, 2023, 2:22 PM UTC

vlovich123 wrote: post #7

When I was an undergrad, one of my professors was exploring “approximate” computation (forget what it was technically called). The gist was that you build mathematical circuitry that approximates an answer instead of giving you a concrete answer (kinda like floating point but also applied to Boolean algebra, integer math etc). The reasoning was that the approximation could let you reduce the power. I wonder where tha…

Approximate computing approximately means using 16 or 8 bit floats instead of standard 32 bit floats.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#238

Post by stonemetal12 » Wed, Feb 22, 2023, 2:23 PM UTC

madmax96 wrote: post #225

This is not a completely hashed-out thought. But I'll share it and see what others think. My impression is that the simplest way to improve energy efficiency is to simplify hardware. Silicon is spent isolating software, etc. Time is spent copying data from kernel space to user space. Shift the burden of correctness to compilers, and use proof-carrying code to convince OSes a binary is safe. Let hardware continue mana…

I doubt it. Special purpose hardware is usually more efficient than a software implementation running on general purpose hardware.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#239

Post by zekica » Wed, Feb 22, 2023, 2:24 PM UTC

tankenmate wrote: post #147

Certhas wrote: post #135

Earlier quoted context omitted.

The main thing AMD has in their accelerators that enables this this is unified memory between CPU and GPU. Thats really interesting.

Don't forget that AMD also bought Xilinx

@WithinReason

I expect them to use Xilinix's AI engines primarily in their CPUs, APUs and GPUs - not so much FPGA.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#240

Post by mastax » Wed, Feb 22, 2023, 2:25 PM UTC

MrBuddyCasino wrote: post #163

tankenmate wrote: post #146

Earlier quoted context omitted.

But don't forget that TSMC's margins for massive bulk purchasers like AMD will be lower than the average.

Does TSMC even have non-bulk customers at 7nm/5nm/4nm? I would have thought the mask costs are so high that it isn't economical except for the biggest companies.

Cerebras has probably bought less than 100 7nm wafers, total. Though they may have gotten many more sales than the last I checked. Tesla Dojo is probably about the same. I've seen loads of random chips like that on 7nm. I guess it depends what you consider "bulk".