131–140 of 328 posts
We have know this for a long time. This is one of the benefits of ARM64 CPUs as they require much less energy. What's new about his point?
They definitely don't require "much" less energy. Zen 4 is very close to the M series in perf per watt
From the perspective of a consumer, my MacBook Pro is basically the perfect laptop, at least in theory. I love the battery life and performance of the hardware, not to mention the unrivaled build quality of the MacBook (screen, trackpad, keyboard). In practice, however, MacOS limits the capabilities of the hardware such that I cannot daily drive my MacBook Pro as a work or personal computer (poor containerization sup…
From my experience developing C++ on it, as long as you don't use anything exotic, everything is portable (i.e. just recompile). On the other hand, for the missing apps and other stuff, I'm running a Linux VM via VMWare Fusion Pro. It works efficiently, and interoperability is good. Just add another internal network card to the VM, and keep an always on SSH/SFTP connection. Then everything works seamlessly. Never had…
The being said, the M1 Pro is a more than good enough piece of hardware that I'm willing to put up with this.
Earlier quoted context omitted.
[flagged]
> It proves my point beautifully when the only response to my comment Your comment was beyond ignorant, and wrong. Most folks here are too smart, or busy, to reply to such nonsense. I am neither. ARM is by far the most shipped and used arch every year. AMZ is even going in heavier on it. It's not legacy tech at all. So a person decided to show you how wrong you were, by listing what's probably the most impressive chi…
Because if the long tail of the hardware industry, the writing can be on the wall long before it's clear based on what you can go out and buy off a shelf today.
Put another way: if AMD (and especially Intel) don't do something about this they're going to get completely eaten alive by ARM. The amount of processing power available in a modern smartphone is truly mind-boggling. I'd love to see a chart showing the chip cost and energy cost of the power on an M1 chip in each previou syear. I would guess that 30+ years ago you'd be in the millions of dollars and watts of power but…
Honestly I don't understand why there's not something like a 256 core ARM laptop with 4TB RAM. The benefit of ARM is scale of multitasking due to not requiring the same kind of lock states that Intel's architecture requires, and can additionally scale much better than only one physical+virtual core pair. I guess the only thing that's holding back ARM is Microsoft, as laptops are expected to run an desktop OS that peo…
I have no idea what you mean by this. The only x86 feature I can think of that might qualify as a 'lock state' is a bus lock that happens when an atomic read-modify-write operation is split over two cache lines. That has a very simple solution ('don't do that'--you have no reason to), and anyway, one can imagine more efficient implementation strategies
> can additionally scale much better than only one physical+virtual core pair
I have no idea what you mean by this either. Wider hyperthreading? It can be worthwhile for some workloads (and e.g. some ibm cpus have 4-way hyperthreading), but is not a panacea; there are tradeoffs involved.
Energy efficiency and improved packaging are things I can readily agree with. The last thing though - “hybrid algorithms leveraging AI efficiency” sounds an awful lot like a buzzword sales pitch. This article reminds of this other one [1] posted about 1 month ago. It’s an interview with some guys that just got done building an exascale supercomputer, in which it was originally estimated to need 1000 megawatts but ult…
Re. The “hybrid algorithms” bit: I was at this talk. The example she gave was a physics sim like CFD, iterating between a fast/approximate ML-based algorithm and slow/accurate classical physics algorithm, with the output of each feeding in as the starting point of the next round. But this was just an example, clearly there are lots of area you could apply a similar approach.
AMD has done extremely well with multi-chip(let) modules. Zen cores & zen clusters (on Core Chiplet Die, CCD) are wonderfully small, and a huge amount of the regular stuff cores do is relegated to the IO Die (CCX), which is not as cutting edge. But wow there's a bunch of power burned on interconnect between CCDs and CCX. And now AMD's new southbridge, Promontory 21, made by Asmedia, is another pretty significant powe…
[0] https://www.macrotrends.net/stocks/charts/TSM/taiwan-semicon...
Earlier quoted context omitted.
> ARM has never and will never touch the desktop market That’s a bold statement as I type all day on an M1 Mac. My FT100 company just made the leap to them as dev machines.
My company has entire teams and regions that do NOT buy PCs and only Mac laptop for employees. Started with the M-series.
Earlier quoted context omitted.
Huh? China has licenses for both the x86_64 and ARM ISAs. WhT about RISC-V makes it an advantage for Chinese companies?
China has licenses for x86-64 “designs” and ARM’s design. Not the ISA. Although “ARM China” is probably enough for them.
Earlier quoted context omitted.
If RISC-V support by Microsoft is as bad as it has been for ARM, then I'm afraid RISC-V will never touch the desktop market, at all. Contrary to ARM, which is being pushed there with great success by Apple. Server-wise of course it's a different story...
If great success to you is that they put the M1 and M2 in a tower, I don't know what to tell you. Intel, AMD, and the x86 industrial complex don't care in the slightest what instruction set your Mac runs
Energy efficiency and improved packaging are things I can readily agree with. The last thing though - “hybrid algorithms leveraging AI efficiency” sounds an awful lot like a buzzword sales pitch. This article reminds of this other one [1] posted about 1 month ago. It’s an interview with some guys that just got done building an exascale supercomputer, in which it was originally estimated to need 1000 megawatts but ult…
What are hybrid algorithms supposed to be anyways? Half algorithm & half dictionary? Half algorithm & half user manual? Half algorithm & half class?
https://www.nature.com/articles/s41586-019-0912-1
and here
https://www.nature.com/articles/s42256-021-00374-3
> The next step will be a hybrid modelling approach, coupling physical process models with the versatility of data-driven machine learning.
The Frontier HPC system that AMD just delivered is aimed fully at that problem.